Computer Systems 1 Quizzes 1-7

X represents an 8 bit signed value that is shifted right (arithmetically) by K bits. According to the discussion in the book, this will sometimes produce the value equivalent to X/(2K), but sometimes not. For the X and K values below, answer YES if this does produce X/(2k) or NO if it does not. X = 1101 1100, K = 2

yes

C operator for logical OR

||

What C bitwise operator (also known as boolean operator) when applied to 0 yields the result -1?

~

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx addq %rcx, %rdx rmmovq %rdx, (%rbx) jne loop halt n: .quad 4 What result would be stored in location n after the program is executed?

0

What is the output of the following C program? #include <stdio.h> int main() { signed char num; num = !0x5e; printf("%x", num & 0xff); }

0

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx addq %rcx, %rdx rmmovq %rdx, (%rbx) jne loop halt /* here */ n: .quad 4 Give the encoding of the y86 instruction labeled /* here */. Give your answer in hex.

00

Recall that a negative (positive) overflow occurs when an arithmetic computation produces a large negative (positive) result that can not be stored in the number of bits allotted. The sum of the 8-bit two's complement numbers 0111 0011 and 1011 0000 results in

0010 0011 and no overflow

Recall that a negative (positive) overflow occurs when an arithmetic computation produces a large negative (positive) result that can not be stored in the number of bits allotted. Assume the two numbers below are 8-bit two's complement. The result of 0111 1101 minus 0011 1101 is:

0100 0000 and no overflow

Consider the following Y86 code: .pos 0x0 irmovq a, %rbx irmovq b, %rcx mrmovq (%rbx), %rbx mrmovq (%rcx), %rcx subq %rbx, %rcx # %rcx - %rbx jg skip irmovq 1, %rax /* here */ jmp join skip: irmovq 2, %rax join: irmovq result, %rbx rmmovq %rax, (%rbx) halt .align 8 a: .quad 8 b: .quad 13 ##### here result: .quad 0 What is the encoding of the pseudo-instruction with the comment "here"? Give your answer in hex.

0d00000000000000

What is the output of the following C program? #include <stdio.h> int main() { signed char num; num = 0x5e || 0x75; printf("%x", num & 0xff); }

1

What is the output of the following C program? #include <stdio.h> int main() { unsigned int n = 0xffffffff; n = n >> 31; printf("%d", n); }

1

As you know, the pushq instruction modifies the stack pointer (%esp). .pos 0 irmovq Stack, %rsp pushq %rsp halt .align 8 .pos 0x100 Stack: Since you are writing a simulator for the Y86 processor, it is important for you to know what value is stored in memory when the instruction "pushq %rsp" is executed ... the initial value of %rsp or the decremented value of %rsp. What is value is stored in location 0xf8 by the program above? Give your answer in hex and omit the leading 0x Hint: you can figure this out by looking at the book's description of the pushq instruction and/or working at practice problem 4.7 on page 370.

100

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. The combinational logic of the sequential processor can be divided into 5 blocks with delays of 40ps, 50ps, 40ps, 30ps, 30ps. We want to create a two stage pipeline out of this sequence so throughput is maximized. (We could insert a pipeline register anywhere to create a two stage pipeline, but we want to do it in a way that maximizes throughput.) It takes 10ps to load a pipeline register. After the pipeline fills, instructions complete at a rate of 1 every X picoseconds. What is X?

110

Recall that a negative (positive) overflow occurs when an arithmetic computation produces a large negative (positive) result that can not be stored in the number of bits allotted. Assume the two numbers below are 8-bit two's complement. The result of 0111 1101 minus 1011 1101 is:

1100 0000 and a positive overflow

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. It takes 250 ps to execute each instruction on the sequential processor, plus an additional 10 ps to store the result in an output register. Assume the pipelined version of this sequential processor divides execution into 5 stages of equal length. What percentage of instruction execution time will be spent writing to pipeline registers?

16.67%

Consider the following Y86 code: .pos 0x0 irmovq a, %rbx irmovq b, %rcx mrmovq (%rbx), %rbx mrmovq (%rcx), %rcx subq %rbx, %rcx # %rcx - %rbx jg skip irmovq 1, %rax jmp join skip: irmovq 2, %rax join: irmovq result, %rbx rmmovq %rax, (%rbx) halt .align 8 a: .quad 8 b: .quad 13 result: .quad 0

2

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. The combinational logic of the sequential processor can be divided into 5 blocks with delays of 40ps, 50ps, 40ps, 30ps, 30ps. We want to create a two stage pipeline out of this sequence so throughput is maximized. (We could insert a pipeline register anywhere to create a two stage pipeline, but we want to do it in a way that maximizes throughput.) It takes 10ps to load a pipeline register. How many pico seconds would it take to execute a single instruction in the pipelined version of this sequential architecture? In other words, what is the latency? Give your answer in picoseconds, but omit the unit.

220

What is the output of the following C program? #include <stdio.h> int main() { signed char num; num = 0x5e ^ 0x75; printf("%x", num & 0xff); }

2b

In the PIPE- architecture (the one that has no forwarding, stalling or bubbling), how many independent instructions (possibly nops) would need to be inserted between the following two instructions in order to ensure that the addq instruction is able to execute using the value retrieved from memory by the mrmovq? In other words, how many nops need to be inserted to avoid the data hazard? mrmovq 8(%rbp), %rax addq %rax, %rcx

3

What is the value stored in register %rbx by the execution of the following program? .pos 0x0 irmovq a, %rbx irmovq b, %rcx mrmovq (%rbx), %rbx mrmovq (%rcx), %rcx subq %rbx, %rcx # %rcx - %rbx cmovl %rcx, %rbx halt .align 8 a: .quad 3 b: .quad 8 Give your answer in decimal or hex (but omit the leading 0x).

3

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. It takes 250 ps to execute each instruction on the sequential processor, plus an additional 10 ps to store the result in an output register. How many pico seconds would it take to execute a single instruction in a pipelined version of this sequential architecture assuming that the sequential execution can be divided into 5 stages of equal length? Note that this time is called the latency. Give your answer in picoseconds, but omit the unit.

300

Consider the following Y86 code: .pos 0x0 irmovq a, %rbx irmovq b, %rcx mrmovq (%rbx), %rbx mrmovq (%rcx), %rcx subq %rbx, %rcx # %rcx - %rbx jg skip irmovq 1, %rax #### here jmp join skip: irmovq 2, %rax join: irmovq result, %rbx rmmovq %rax, (%rbx) halt .align 8 a: .quad 8 b: .quad 13 result: .quad 0 What is the encoding of the instruction with the comment "here"? Give your answer in hex.

30f00100000000000000

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx /* here */ addq %rcx, %rdx rmmovq %rdx, (%rbx) jne loop halt n: .quad 4 Give the encoding of the y86 instruction labeled /* here */. Give your answer in hex.

30f1ffffffffffffffff

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx /* here */ loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx addq %rcx, %rdx rmmovq %rdx, (%rbx) jne loop halt n: .quad 4 Give the encoding of the y86 instruction labeled /* here */. Give your answer in hex.

30f33400000000000000

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx addq %rcx, %rdx rmmovq %rdx, (%rbx) /* here */ jne loop halt n: .quad 4 Give the encoding of the y86 instruction labeled /* here */. Give your answer in hex.

40230000000000000000

As you know, the popq instruction modifies the %rsp (stack pointer). .pos 0 irmovq Stack, %rsp irmovq n, %rcx mrmovq (%rcx), %rcx pushq %rcx popq %rsp halt .align 8 n: .quad 5 .pos 0x100 Stack: Since you are writing a simulator for the Y86 processor, it is important for you to know the final value of %esp when the instruction "popq %rsp" is executed ... the value from memory or the incremented %rsp. In the code above, what is the value of %rsp when the halt is reached? Hint: you can figure this out by looking at the book's description of the pushl instruction and/or working at practice problem 4.8 on page 371.

5

What is the value stored in register %rbx by the execution of the following program? .pos 0x0 irmovl a, %rbx irmovl b, %rcx mrmovl (%rbx), %rbx mrmovl (%rcx), %rcx subl %rbx, %rcx # %rcx - %rbx cmovne %rcx, %rbx halt .align 8 a: .quad 3 b: .quad 8 Give your answer in decimal or hex (but omit the leading 0x).

5

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx /* here */ irmovq $-1, %rcx addq %rcx, %rdx rmmovq %rdx, (%rbx) jne loop halt n: .quad 4 Give the encoding of the y86 instruction labeled /* here */. Give your answer in hex.

50230000000000000000

What is the output of the following C program? #include <stdio.h> int main() { signed char num; num = 0x5e & 0x75; printf("%x", num & 0xff); }

54

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. It takes 250 ps to execute each instruction on the sequential processor, plus an additional 10 ps to store the result in an output register. Assume the pipelined version of this sequential processor divides execution into 5 stages of equal length. After the pipeline is filled, instructions complete at rate of 1 every X picoseconds. What is X?

60

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx addq %rcx, %rdx /* here */ rmmovq %rdx, (%rbx) jne loop halt n: .quad 4 Give the encoding of the y86 instruction labeled /* here */. Give your answer in hex.

6012

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx addq %rcx, %rdx rmmovq %rdx, (%rbx) jne loop /* here */ halt n: .quad 4 Give the encoding of the y86 instruction labeled /* here */. Give your answer in hex.

740a00000000000000

Consider the following Y86 code: .pos 0x0 irmovq a, %rbx irmovq b, %rcx mrmovq (%rbx), %rbx mrmovq (%rcx), %rcx subq %rbx, %rcx # %rcx - %rbx jg skip #### here irmovq 1, %rax jmp join skip: irmovq 2, %rax join: irmovq result, %rbx rmmovq %rax, (%rbx) halt .align 8 a: .quad 8 b: .quad 13 result: .quad 0

764600000000000000

What is the output of the following C program? #include <stdio.h> int main() { signed char num; num = 0x5e | 0x75; printf("%x", num & 0xff); }

7f

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. The combinational logic of the sequential processor can be divided into 5 blocks with delays of 40ps, 50ps, 40ps, 30ps, 30ps. We want to create a two stage pipeline out of this sequence so throughput is maximized. (We could insert a pipeline register anywhere to create a two stage pipeline, but we want to do it in a way that maximizes throughput.) It takes 10ps to load a pipeline register. What is the throughput?

9.1 GIPS

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. The combinational logic of the sequential processor can be divided into 5 blocks with delays of 40ps, 50ps, 40ps, 30ps, 30ps. We want to create a two stage pipeline out of this sequence so throughput is maximized. (We could insert a pipeline register anywhere to create a two stage pipeline, but we want to do it in a way that maximizes throughput.) It takes 10ps to load a pipeline register. What percentage of the execution time is spent loading pipeline registers?

9.1%

Recall that a negative (positive) overflow occurs when an arithmetic computation produces a large negative (positive) result that can not be stored in the number of bits allotted. The sum of the 8-bit two's complement numbers 1100 1101 and 1000 0111 results in

0101 0100 and a negative overflow

Consider the following Y86 program: .pos 0x0 irmovq n, %rbx loop: mrmovq (%rbx), %rdx irmovq $-1, %rcx addq %rcx, %rdx rmmovq %rdx, (%rbx) jne loop halt n: .quad 4 Give the encoding for the memory value at the location with label n. Give your answer in hex.

0400000000000000

Assume that you are a computer architect charged with improving the performance of a sequential processor by employing pipelining. It takes 250 ps to execute each instruction on the sequential processor, plus an additional 10 ps to store the result in an output register. Assume the pipelined version of this sequential processor divides execution into 5 stages of equal length. What is the pipeline throughput?

16.67 GIPS

Consider figure 4.23 in your textbook on page 399. What do the white labeled ovals and circles represent?

These are used to indicate input and output lines (wires).

Consider figure 4.23 in your textbook on page 399. What do the gray, labeled rounded rectangles represent?

These represent control logic circuits

What C logical operator when applied to 0 yields the result 1?

!

What is the output of the following C program? #include <stdio.h> int main() { signed char num; num = 0x5e && 0x75; printf("%x", num & 0xff); }

1

size of integer and pointer data

Word size

What is the output of the following C program? #include <stdio.h> int main() { int n = 0xffffffff; n = n >> 31; printf("%d", n); }

-1

What is the value stored in register %rbx by the execution of the following program? .pos 0x0 irmovq a, %rbx irmovq b, %rcx mrmovq (%rbx), %rbx mrmovq (%rcx), %rcx subq %rbx, %rcx # %rcx - %rbx cmovl %rcx, %rbx halt .align 8 a: .quad 8 b: .quad 3 Give your answer in decimal or hex (but omit the leading 0x).

-5

Determine the control dependencies in the following code: S1: addq %rcx, %rax S2: jne S4 S3: subq %rdx, %rax S4: andq %rcx, %rbx

S3 is control dependent upon S2

byte ordering in which the high order byte in a word has the least address

big endian

In the code segment below, assume that ux is an unsigned int. if (ux > -1) printf("howdy"); else printf("goodbye"); For this statement, the output:

will always be goodbye

In the code segment below, assume that ux is an unsigned int. if (ux >= 0) printf("howdy"); else printf("goodbye"); For this statement, the output:

will always be howdy

In the code segment below, assume that x and y are ints and ux and uy are unsigned ints. ux = x; uy = y; if ((x + y) == (ux + uy)) printf("howdy\n"); else printf("goodbye\n"); For these statements, the output will:

will always be howdy

In the code segment below, assume that x is an int. if (((x >> 1) << 1) <= x) printf("howdy"); else printf("goodbye"); For this statement, the output:

will always be howdy

Consider the following HCL: bool out = (a && !b && !c) || (!a && !b && c) || (!a && b && !c) || (a && b && c); What kind of circuit does the HCL represent?

Bit Sum

Consider figure 4.23 in your textbook on page 399. What is the purpose of the white circle with label dstE?

It identifies a register to be written to during writeback, writing the value produced by the ALU.

Consider figure 4.23 in your textbook on page 399. What is the purpose of the gray, rounded rectangle with the label srcA?

It is used to calculate the register number that is used to read from the register file.

Consider the following HCL: int OUT = [ !in1 && !in2 : 0; !in1 && in2 : 1; in1 && !in2 : 2; in1 && in2 : 3; ]; What kind of circuit does the HCL represent?

Multiplexer

Control Hazard

One instruction determines whether a subsequent instruction will be executed or not, and the execution of those two instructions on a pipelined machine has the potential of causing erroneous results.

Data Hazard

One instruction produces a result that is used by a subsequent instruction and the execution of those two instructions on a pipelined machine has the potential of causing erroneous results.

Latency

The amount of time it takes to execute a single instruction on a processor

Forwarding

The hardware operation in which a result is passed from a later point in the pipeline to the decode stage is called

Throughput

The number of instructions executed per unit time on a processor

Stall

The operation in which hardware applies a control signal to a register which causes the register to ignore the input and maintain the current value is called a

the set of all possible memory addresses

Virtual Address space

Bubble

When hardware applies a control signal to a register which causes the equivalent of a nop instruction to be stored in the register, it has performed an operation called a

Data Dependency

When one instruction produces a result that is needed by a subsequent instruction, then what exists between those two instructions is called a

Control Dependency

When the execution of one instruction determines whether another instruction will be executed or not, then what exists between those two instructions is known as a

S1: irmovq $3, %rdx S2: irmovq $2, %rcx S3: addq %rdx, %rax S4: addq %rcx, %rdx Figure out the data dependencies in the code above. Which of the following are true?

a. S4 is data dependent upon S1 b. S3 is data dependent upon S1 d. S4 is data dependent upon S2

What is the output of the following C program? #include <stdio.h> int main() { signed char num; num = ~0x5e; printf("%x", num & 0xff); }

a1

For which of the following instructions are both srcA and srcB the registers specified by the register id byte? (Hint: what do srcA and srcB represent?)

addq rmmovq

Consider the following HCL: bool out = (!in1 && in0) || (in1 && !in0); What kind of circuit does the HCL represent?

bit exclusive or

Identify which of the following instructions would cause memory to be written to during instruction processing.

call rmmovq

Identify the characteristic below as being that of a RISC machine or a CISC machine by giving the answer "risc" or "cisc" (without the quotes). Instruction set consists of a large number of instructions.

cisc

Identify the characteristic below as being that of a RISC machine or a CISC machine by giving the answer "risc" or "cisc" (without the quotes). Instruction set has explicit push and pop instructions and passes parameters via the stack.

cisc

Identify the characteristic below as being that of a RISC machine or a CISC machine by giving the answer "risc" or "cisc" (without the quotes). Instructions vary in length.

cisc

Identify the characteristic below as being that of a RISC machine or a CISC machine by giving the answer "risc" or "cisc" (without the quotes). Machine has condition code registers that are set as a side effect of instruction execution and used for conditional branching.

cisc

In the code segment below, assume that x and y are ints. if ((x > y) && (-x < -y)) printf("howdy"); else printf("goodbye"); For this statement, the output:

could be either howdy or goodbye depending upon the value of x

In the code segment below, assume that x is an int. if (((x >> 1) << 1) == x) printf("howdy"); else printf("goodbye"); For this statement, the output:

could be either howdy or goodbye depending upon the value of x

In the code segment below, assume that x is an int. if ((x < 0) && (x * 2) < 0) printf("howdy"); else printf("goodbye"); For this statement, the output:

could be either howdy or goodbye depending upon the value of x

What is the output of the following C code? unsigned int ux = -3; unsigned int x = 3; if (x > ux) printf("howdy"); else printf("goodbye");

goodbye

Identify which of the following instructions would cause memory to be read during the instruction processing (in addition to the read caused by the instruction fetch).

mrmovq ret

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling, and predicts branches as taken. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a control hazard on this machine? irmovq $3, %rax andq %rax, %rax jne skip irmovq $2, %rdx subq %rdx, %rax skip: addq %rax, %rax

no

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? addq %rcx, %rax nop subq %rbx, %rdx nop addq %rax, %rsi

no

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? addq %rcx, %rax subq %rbx, %rdx

no

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? mrmovq (%rbx), %rdx nop nop addq %rcx, %rsi subq %rdx, %rax

no

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? mrmovq (%rbx), %rdx subq %rbx, %rax

no

X represents an 8 bit signed value that is shifted right (arithmetically) by K bits. According to the discussion in the book, this will sometimes produce the value equivalent to X/(2K), but sometimes not. For the X and K values below, answer YES if this does produce X/(2k) or NO if it does not. X = 1101 1001, K = 1

no

X represents an 8 bit signed value that is shifted right (arithmetically) by K bits. According to the discussion in the book, this will sometimes produce the value equivalent to X/(2K), but sometimes not. For the X and K values below, answer YES if this does produce X/(2k) or NO if it does not. X = 1101 1101, K = 3

no

Which of the following instructions would require dstE to be the stack pointer (%rsp)?

popq call

Assuming that result and ux are unsigned ints, select the C statement that computes the same result as the given C statement.

result = ux << 5; - result = ux * 32;, result = ux >> 5; - result = ux / 32;, result = (ux << 4) + (ux << 2); - result = ux * 20;, result = (ux << 5) + (ux << 3) + (ux << 2) + ux; - result = ux * 45;, result = ((ux << 3) - ux) >> 2; - result = 7 * ux / 4;, result = ((ux << 5) - (ux << 3) - ux) >> 3; - result = (ux * 23) / 8;

Identify the characteristic below as being that of a RISC machine or a CISC machine by giving the answer "risc" or "cisc" (without the quotes). No instruction with a long execution time.

risc

Identify the characteristic below as being that of a RISC machine or a CISC machine by giving the answer "risc" or "cisc" (without the quotes). Only load and store instructions access memory.

risc

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling, and predicts branches as taken. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a control hazard on this machine? irmovq $0, %rax andq %rax, %rax jne skip irmovq $2, %rdx subq %rdx, %rax skip: addq %rax, %rax

yes

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? addq %rcx, %rax subq %rax, %rdx

yes

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? addq %rcx, %rax subq %rbx, %rdx addq %rax, %rsi

yes

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? addq %rcx, %rax subq %rbx, %rdx nop addq %rax, %rsi

yes

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? mrmovq (%rbx), %rdx addq %rcx, %rsi subq %rdx, %rax

yes

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? mrmovq (%rbx), %rdx nop addq %rcx, %rsi subq %rdx, %rax

yes

Consider a pipeline architecture that performs the identical F, D, X, M, W stages as described in the book, but does not perform forwarding, stalling or bubbling. Your book calls this the PIPE- machine. Would the execution of the following instructions cause a data hazard on this machine? mrmovq (%rbx), %rdx subq %rcx, %rdx

yes

X represents an 8 bit signed value that is shifted right (arithmetically) by K bits. According to the discussion in the book, this will sometimes produce the value equivalent to X/(2K), but sometimes not. For the X and K values below, answer YES if this does produce X/(2k) or NO if it does not. X = 0001 1001, K = 1

yes

X represents an 8 bit signed value that is shifted right (arithmetically) by K bits. According to the discussion in the book, this will sometimes produce the value equivalent to X/(2K), but sometimes not. For the X and K values below, answer YES if this does produce X/(2k) or NO if it does not. X = 1101 1000, K = 3

yes