I/O, devices, and drivers

Status Register

- A device I/O register in which status is indicated. ?? - Place where a device state is stored and can be read

Interrupts

- A hardware mechanism that enables a device to notify the CPU that it needs attention. ?? - signals sent to the CPU by external devices to indicate an event that needs immediate attention - The basic interrupt mechanism works as follows. The CPU hardware has a wire called the interrupt-request line that the CPU senses after executing every instruction. When the CPU detects that a controller has asserted a signal on the interrupt-request line, the CPU performs a state save and jumps to the interrupt-handler routine at a fixed address in memory. The interrupt handler determines the cause of the interrupt, performs the necessary processing, performs a state restore, and executes a return from interrupt instruction to return the CPU to the execution state prior to the interrupt. We say that the device controller raises an interrupt by asserting a signal on the interrupt request line, the CPU catches the interrupt and dispatches it to the interrupt handler, and the handler clears the interrupt by servicing the device. Figure 12.2.3 summarizes the interrupt-driven I/O cycle.

Polling

- An I/O loop in which an I/O thread continuously reads status information waiting for I/O to complete. - host repeatedly reads the busy bit until that bit becomes clear. - "busy-waiting" the host uses a loop to repeatedly read the status register over and over until the status bit becomes clear, and then proceeds with the next part of processing the command. - example: 1.An Example from your text for WRITING : a)The host repeatedly reads the status register and checks the busy bit until that bit becomes clear b)The host sets the write bit in the command register and places a byte into the data-out register c)The host sets the command-ready bit in the status register d)The controller senses the command-ready bit is set and sets the busy bit e)The controller reads the command register and sees the write command: It reads the data-out register and sends the byte to the device f)The controller clears the command-ready bit, and clears the error bit in the status register, and finally clears the busy bit. g)Repeat until all characters are written

Scan

- In this algorithm the arm starts at one end of the disk and moves (completely) toward the other end servicing requests as it goes. - Choosing the next request in the given direction. - Once it reaches the "other" end the direction of the head movement is reversed and servicing continues. - for our requests: 95, 152, 37, 124, 10, 55, 6, 70 - If the read/write head is at cylinder 50, and we are moving toward sector 0. The requests would be serviced as: - 37, 10, 6, 55, 70, 95, 124, 152 - This results in the least amount of arm movement to service the next request. Sometimes called the elevator algorithm since the arm behaves like an elevator servicing all of the requests in one direction before CSCAN: - The C-SCAN or circular SCAN scheduling algorithm provides a more uniform waiting time by scanning from the beginning of the disk to the end servicing requests as it goes, and them immediately returns to the beginning of the disk without servicing any requests, and begins again.

Character Device

- These devices transfer data one character/byte at a time between the device and the computer. ¨Keyboards ¨serial ports ¨Involves a series of transfers one byte at a time to complete an operation Simple I/O -- with character devices AKA Programmed I/O Used on small and medium sized computers to handle character devices Requires a distinct I/O instruction to transfer data to or from the device registers Sends data one byte at a time, managed by the device driver CPU participates in all parts of the transfer, using polling or interrupts.. OS has control of communications

Block Device

- Usually storage devices: hard disks, etc. - These are devices that transfer large groups of bytes called blocks in a single operation. - Once an operation is started, it proceeds under control of the device controller & interrupt handler (device driver) without further intervention by the OS (I/O subsystem) until the operation is complete. A device that moves information in blocks or groups of bytes instead of characters. An example is a disk drive.

Rotational Delay

- additional time to rate the disk to the correct sector -In a disk drive, the time required for the disk to revolve until the correct sector is under/over the read/write heads. See also the definition for "seek time".

Direct Memory Access Controller

- controls exchange of data between main memory and the I/O device - ¨has permission to access memory directly without involvement on the part of the CPU. ¨Once initiated the device performs the transfer and ONLY notifies the OS when finished ¨The OS allocates buffer space in memory ¨It initiates a transfer with the device and indicates the location of the buffer. DMA: - A resource-conserving and performance-improving operation for device controllers allowing devices to transfer large amounts of data directly to and from main memory. nTo initiate a DMA transfer ¨The host writes a DMA command block into memory. ¨The block contains a pointer to the source of the transfer, a pointer to the destination of the transfer and a count of the number of bytes to transfer. ¨The CPU/I/O Subsystem writes the address of the command block to the DMA controller, and goes on with other work. ¨The DMA controller proceeds to operate the memory bus directly until the transfer is complete. ¨It signals if additional service is needed via interrupts ¨When the operation is complete the device signals the completion via an interrupt ¨Disk Drives, Graphics Cards...

Device Controller

- handles and controls communications between the OS and a device through the port. - The basic "handshaking" between a device controller and a host is relatively straight forward. We will assume: ¨The controller indicates its state through the busy bit in the status register. (to set a bit, we place a 1 in the bit, putting a 0 in a bit clears it) ¨The controller sets the busy bit when it is working and clears it when it is ready for the next command. ¨The host signals its wishes (to execute a command) via the command-ready bit in the command register. ¨The host sets the command-ready bit when a command is available for the controller to execute.

Event Flag

- in a IOCB, used to signal to the scheduler that the current operation on a device is complete. - in a DCB, used to communicate with the I/O scheduler

I/O Scheduler

- processes input and output requests. Its first task is to examine the system call parameters and ensure that the request is valid. In particular, the operation must be READ or WRITE; the device must be a recognized one, and the operation must be legal for the specified device. If these conditions are not met, an error code should be returned. The next task is to check the status of the requested device by accessing its IOCB. If there is no current process using the device, then the request can be processed immediately. In this case the requesting process is made the active one by installing a pointer to its PCB in the IOCB. The buffer address and length must also be placed in the IOCB. The appropriate driver procedure is then called. If the device was busy, the request is installed on the waiting queue. The information in each queue element must include the PCB pointer, device ID, and operation code. Finally, the I/O Scheduler returns to the system call handler, which in turn will invoke the dispatcher to dispatch the next process. - does NOT directly communicate with device or device controller: IT initiates commands via components of the device driver.

Data Register

- small, fast storage location within the CPU or a peripheral device. It is used to store temporary data during processing. CPU registers are used for quick access to operands and intermediate results during arithmetic and logical operations. Peripheral registers are often used to interface with external devices, allowing data to be transferred between the device and the CPU. ?? - A device I/O register where data is placed to be sent to the device. - data-in register: A device I/O register where data is placed to be sent to the device. - data-out register: A device I/O register where data is placed by the device to be read by the computer.

I/O Processor

- specialized processor or a part of the main processor that manages communication between the CPU and peripheral devices. Its primary function is to handle data transfer between the CPU and external devices such as storage devices, network interfaces, and other input/output devices. This offloads the CPU from managing low-level details of I/O operations, improving overall system performance. ?? - Processor reads data from an I/O device via an I/O module

Synchronous

- synchronous device performs data transfers or generate interrupts at predictable rate(System Clock)

Buffering

- technique used in computer science to temporarily store data in a buffer, which is a region of memory. This is done to smooth out differences in data flow rates between different components of a computer system. For example, when data is transferred between two devices with different speeds, a buffer can be used to store data temporarily so that the faster device doesn't have to wait for the slower one to catch up. Buffers are commonly used in input/output operations to manage data transfer between the CPU and peripheral devices efficiently. They help in optimizing data flow and preventing bottlenecks in the system. ?? - creating supplies of excess resources in case of unpredictable needs - buffer: A memory area that stores data being transferred (e.g., between two devices or between a device and a process). - double buffering: The copying of data twice (e.g., from a device to the kernel and then from the kernel to a process's address space), or the use of two buffers to decouple producers and consumers.

Access Time

- time it takes to retrieve information from a storage device or memory. It is a crucial performance metric in computer systems. In the context of memory, access time includes the time it takes to locate and read data from a specific memory location. In storage devices like hard drives or solid-state drives, access time involves the time it takes to position the read/write heads and start reading or writing data. ?? - the time it takes a storage device to locate its stored data

Command/Control Register

Command Register: - hosts set the write bit in the command register - controller reads the command register and sees the write command: It reads the data-out register and sends the byte to the device Control register: - sets a bit in control register to signal data is ready

I/O Complete

I/O completion: -Once the requested operation is finished, some cleanup must still occur ¨Setting the status of the process requesting the operation back to ready ¨Clearing the device busy status, and disabling interrupts ¨Have the I/O scheduler search a device queue, for the next operation to initiate - I/O complete: - "I/O complete" refers to the status or condition of an Input/Output (I/O) operation when it has been successfully finished or concluded. In the context of computer systems, I/O operations involve the transfer of data between the central processing unit (CPU) and external devices such as storage devices, network interfaces, or other peripherals. When an I/O operation is initiated, the system often monitors its progress. The term "I/O complete" signifies that the requested input or output operation has been successfully executed, and the data transfer is finished. This status is essential for programs or processes to know when they can proceed with the next task that depends on the completion of the I/O operation. In programming and operating systems, mechanisms such as interrupts or callbacks may be used to notify the system or the executing program when an I/O operation is complete, allowing for efficient handling of asynchronous tasks and resource management.

SSTF

Shortest-seek-time-first ¨This algorithm chooses to service requests in the order that requires the shortest seek time. ¨Choose the request closest to the current head position. So for our previous set of requests: ¨95, 152, 37, 124, 10, 55, 6, 70 ¨These would be processed in the order n55, 70, 95, 124, 152, 37, 10, 6 - if two requests are the same distance, choose the one in the direction the arm is going - is essentially a form of the shortest-job-first scheduling, except for disk operations. - It can also cause starvation for some requests. ¨Because new requests can arrive at any time

Device Control Block (DCB)

The device control block contains information, about the status of the device, and the current operation. It is solely managed and accessed by the device driver. It would contain such information as: - Device open Flag -- has the device been initialized - Device status flag -- available or busy - pointer to the processes "buffer" - pointer to the internal buffer for the device - Count of the number of characters to transfer - Count of the number of characters that has been transferred - Reference (pointer) to the process requesting the operation - Event flag - to communicate with the I/O scheduler

Seek Time

time for the disk arm to move the head to the correct track/cylinder.. (For a multi-platter/multi-read write head disk, a cylinder is all of the tracks at the same arm position, on all disks.)

Device Flag

used by the device driver to communicate with the I/O subsystem to indicate the status of the operation - = 0, device is working on an operation - = 1, not working - = -1, error code - device error

FCFS

¨The simplest selection algorithm is first come first served (FIFO) ¨Although "fair" to all processes, it rarely produces the fastest service time. ¨Consider a set of pending requests for blocks on cylinders: 95, 152, 37, 124, 10, 55, 6, 70 ¨If the disk head is initially at "cylinder" 50 servicing these set of requests in order involves many arm movements. ¨From 50 - 95, then from 95 to 152, then to 37, etc