8 - Instruction Set Architectures
How many memory cycles does an RRR instruction in Sigma16 use?
1 (to fetch the operation word).
How many cycles does a JUMP operation take in Sigma16?
2
How many memory cycles does a LOAD operation in Sigma16 take?
3
What is faster than a memory cycle?
A CPU internal operation, like accessing a register. Memory cycles are considerably slower. Accessing memory is generally the slowest part of an instruction.
A stack
A last-in-first-out (LIFO) data structure.
Subroutine
A sequence of computer instructions for performing a specified task that can be used repeatedly. CPU can jump to the sequence in such a way that control can always be transferred back to the instruction after the one that jumped to it.
What is the difference between a subroutine call and a jump?
A subroutine call allows the program counter to be returned to the correct instruction after the call using a return address.
A stack pointer
A value denoting the most recent allocated address in a stack. Used as an index register to access data within the stack frame.
How many memory cycles would a 3-address instruction use?
ADD x[R1],y[R2],z[R3] --- 7 memory cycles. Fetch operation, Fetch and store each memory location.
Give an example syntax for a 3-address instruction.
ADD x[R1],y[R2],z[R3].
How long would a 3-address instruction be?
ADD x[R1],y[R2],z[R3]. --- 4 words long (operation), x, y, z
Name some machine specific registers.
Address Register (ADR), Data Register (DAT)
Stack overflow
An error condition that occurs when attempting to push register values onto a stack that's already at its maximum capacity. Can also be when the stack risks overwriting existing data.
Which is higher level? A memory cycle or an instruction cycle.
An instruction cycle, which involves several memory cycles.
Why aren't IR, ADR and DAT used in the programmer's model?
Because they do not carry information between instruction cycles. They are useful for debugging but can be ignored. They are sometimes referred to as temporary registers.
Why can machine code be dangerous?
Can destroy or hijack other code on the system.
What is CISC?
Complex Instruction Set Computer
Why not have instructions of multiple types in a CPU?
Complex instructions mean a long operation word and a complex control unit. This is slower than a simple control unit.
Program Counter
Contains the address of the next instruction that will be executed.
Instruction Register
Contains the operation word of the current instruction being executed.
Address Register
Contains the target address specified in an RX or X instruction.
How do HLL and operating systems prevent damage?
HLL will try to identify programming errors. Operating systems will block an application program from doing something that looks dangerous.
Data Register
Holds temporary data.
What questions should you use to examine a machine code (assembly) instruction?
How many memory cycles are needed to fetch the whole instruction? How many memory cycles are needed to fetch or store data? How many independent memory locations can the instruction access?
What are the special hardware registers associated with the Control Unit?
IR (Instruction Register), PC (Program Counter)
Define the internal execution process of a JUMP instruction.
IR := Memory[PC]; PC := PC+1; ADR := Memory[PC]; PC := PC+1; ADR := ADR + R1; // Because JUMP ADR[R1] PC := ADR; --- IR := Memory[PC]
Virtual Machine (VM)
Implemented in software rather than hardware. Implementation (guest) is called an emulator and can be run on chosen real hardware (host).
What is the tradeoff by including more instructions in a CPU architecture?
Longer words are needed to store the instruction words, which requires more processing. It is slower.
What HLL constructs use subroutines as a basis?
Procedures, functions, methods, coroutines.
What operations can be applied to a stack?
Push (storing an item at the top of the stack). Pop / Pull (retrieve the last pushed - most recent - item).
memory cycle
Reading or writing a single word to and from memory (over the data bus). They will take a fixed amount of time, depending on the CPU and memory.
What is RISC?
Reduced Instruction Set Computer Developed in the 80s. Eliminates complex instructions by preventing most instructions from accessing memory. Fast internal registers are used. Required lots of internal registers. Simple, fast control unit. Memory access only via LOAD and STORE. Sometimes called a LOAD-STORE architecture.
Why was Intel's x86 architecture successful in terms of instruction types?
Started as CISC, but was modified to include RISC ideas. Compromised between the two architecture types.
How do subroutines involve the stack?
Subroutines can be nested. Therefore, return addresses are stored on the stack in memory, because register file may not have space (enough registers) to track all return addresses. After subroutine calls, return address is stored on the stack and increment SP. After a return, the address at stack top is retrieved and the SP is decremented.
instruction cycle
The fetching, decoding and execution of a machine code instruction. They take variable time.
When does an instruction cycle take longer to fetch?
When there are multiple word instructions.
