Digital Final

ICQ11c

Same problem

Convert the following decimal number into 8-bit fixed-precision unsigned hex value: 76

$4C

Convert the following 8-bit fixed precision unsigned binary to hexadecimal % 1010 1101

$AD

Convert the following binary value into 12-bit fixed-precision unsigned hex value%1011 1100 0111

$BC7

Convert the following decimal number into 8-bit fixed-precision unsigned binary value: 81

%01010001

Convert the following decimal number into 8-bit fixed-precision unsigned binary value: 141

%10001101

Just like the Analogy: Due to road construction, four lanes (the data inputs) may be reduced to a single lane (the single output). A policeman (the select inputs) selects which one lane currently passes through by blocking the other lanes. Just as sometimes the police have one lane open, but no cars are coming through at that time, when the input for the data input selected =0, the output = __________.

0

Some decoders have an additional input called an enable input that when 0 sets all outputs to ____, and when 1 enables the decoder for normal behavior..

0

Some decoders have an additional input called an enable input that when 0 sets all outputs to ____.

0

To do normal addition on the adder/subtractor, the input sub must equal ____________.

0

Subtract the following 4-bit, fixed-precision, 2s complement numbers and give the 4-bit result along with the overflow result. 0011 - 0001

0010, overflow did not occur

Add the following 8-bit, fixed-precision, 2s complement numbers and give the 8-bit sum along with the overflow result. 0111 1110 + 1011 0101

0011 0011, overflow did not occur

Add the following 4-bit, fixed-precision, 2s complement numbers and give the 4-bit sum along with the overflow result. 0111 + 1101

0100, overflow did not occur

Convert the following 12-digit fixed-precision unsigned hex value to binary: $65E

0110 0101 1110

Consider a designer who wishes to design a circuit. Order the steps (1 to 4) for the top down design process.

1. Capture as a truth table 2. Convert to an equation 3. Convert to a schematic diagram 4. Build the circuit

Given a three variable function, match the minterms to the corresponding number.

1. m6 = abc' 2. m2 = a'bc' 3. m1 = a'b'c 4. m0 = a'b'c' 5. m5 = ab'c

Order the steps to transform the following equation to sum-of-minterms form.(use the ordering: Original Equation, 1,2,3,4,5 for the steps) y = a + bc Start with the original equation!

1. y = a + bc 2. y = a(1)(1)+(1)bc 3. y = a(b'+b)(c'+c) + (a'+a)bc 4. y = ab'c'+ab'c +abc'+abc + a'bc+abc 5. y = ab'c' + ab'c + abc' + abc + a'bc

Add the following 4-bit, fixed-precision, 2s complement numbers and give the 4-bit sum along with the overflow result. 1101 + 1011

1000, overflow did not occur

Add the following 8-bit, fixed-precision, 2s complement numbers and give the 8-bit sum along with the overflow result. 1101 1110 + 1011 0101

1001 0011, overflow did not occur

Add the following 4-bit, fixed-precision, 2s complement numbers and give the 4-bit sum along with the overflow result. 0111 + 0010

1001, overflow occurred

Subtract the following 4-bit, fixed-precision, 2s complement numbers and give the 4-bit result along with the overflow result. 0111 - 1101

1010, overflow occurred

Add the following 4-bit, fixed-precision, 2s complement numbers and give the 4-bit sum along with the overflow result. 0101 + 0110

1011, overflow occurred

Convert the following 8-bit fixed precision unsigned binary value to decimal % 0110 1010

106

Subtract the following 8-bit, fixed-precision, 2s complement numbers and give the 8-bit result along with the overflow result. 0101 1110 - 1000 0101

1101 1001, overflow occurred

Subtract the following 4-bit, fixed-precision, 2s complement numbers and give the 4-bit result along with the overflow result. 0101 - 0110

1111, overflow did not occur

Convert the following 8-bit fixed precision unsigned binary to decimal % 1010 1101

173

A half Adder creates an arithmetic circuit that adds _________ single bit inputs.

2

If the oscillator used for the clocking input has a frequency of 50MHz, what is the period of the clock?

20 nsec

A full Adder creates an arithmetic circuit that adds _________ single bit inputs.

3

How many D flip-flops are needed for binary encoding of a FSM with 8 states

3

Because two's-complement representation performs subtraction by complementing and adding, a single adder circuit can perform either addition or subtraction, thus saving circuit size. What device must be placed in the circuit to select between addition or subtraction.

4 2:1 Muxes

If the oscillator used for the clocking input has a frequency of 2 MHz, what is the period of the clock?

500 nsec

Convert the following 2-digit fixed-precision unsigned hexadecimal value to decimal: $42

66

A 4-bit subtractor can be made from a 4-bit adder along with 4 inverters into input B[3:0] and setting Cin to 1. This can be written algebraically as

A - B = A + (-B)

GIven the following equation, F(A,B,C,D) = Σm(0, 1, 2, 4, 6, 10, 11, 14,15), what would be an equation for F(A,B,C,D) minimized. Use the Boolean theorems and minimize.

AC +A'B'C' + A'D'

Which of the following inputs causes a rising edge triggered DFF to go to 0 immediately.

Asynchronous Clear

Write the equation for the output C( or CarryOut) for a half adder, Make a truth table if necessary.

C(A,B) = AB

Write the minimum SOP equation for the output C( or CarryOut) for a full adder. Make a kmap from your truth table.

C(A,B,Cin) = AB + A(Cin) + B(Cin)

Write the SOP CANONICAL equation for the output C( or CarryOut) for a full adder. Hint: Make a truth table if necessary.

C(A,B,Cin) = AB(Cin) + AB(Cin)' + AB'(Cin) + A'B(Cin)

D flip flop

Edge triggered

ICQ 11

Every Question on ICQ 11 needed pictures and I don't pay for quizlet plus so I can't add images. Sorry

Given the following function F(a,b,c) = Determine a equivalent SOP equation that has been simplified.

F = ac + a'bc'

Given the following function, determine the minimum SOP equation.F(A, B, C, D) = m(0, 1, 2, 3, 8, 9, 10, 11)

F(A, B, C, D) = B'

Given the following function, determine the minimum SOP equation.F(A, B, C, D) = m(0, 2, 8, 10)

F(A, B, C, D) = B'D'

Given the following function, determine the minimum SOP equation.F(A, B, C, D) = m(0, 4, 8, 12)

F(A, B, C, D) = C'D'

Given the following function, determine which of the following equations would be minimum SOP equation. Mark all choices that are minimum SOP. F(A, B, C, D) = m(0, 1, 5, 7, 10, 14, 15)

F(A,B,C,D) = A'B'C' + A'BD + ABC + ACD'. F(A,B,C,D) = A'B'C' + A'C'D + BCD + ACD'. F(A,B,C,D) = A'B'C' + A'BD + BCD + ACD'

Given the following function, determine the minimum SOP equation. F(A, B, C, D) = m(0, 1, 2, 3, 4, 6, 8, 9, 10 , 11, 12, 14)

F(A,B,C,D) = B' + D'

What is the name of the time T, shown below (the time after the active edge of the clock that synchronous inputs must not change).

Hold Time

D latch

Level sensitive

Order the steps to transform the following equation to sum-of-minterms form.(use the ordering: Original Equation, 1,2,3,4,5 for the steps) y = (a + c)b

OE. y = (a + c)b 1. y = ab + bc 2. y = ab(1) + bc(1) 3. y = ab(c + c') + bc(a + a') 4. y = abc + abc' + abc + a'bc 5. y = a'bc + abc' + abc

Select which of the following equations implement a 4:1 Multiplexer. HINT: Write the truth table for the select inputs for a 4:1 Mux to determine the circuit implementation.

Out = S1'S0'D0 + S1'S0D1 + S1S0'D2 + S1S0D3

To make a truth table for a mux, we could only write the rows where a specific input is selected, and the other inputs as DON'T CARES. For a 4:1 Multiplexer, for what is the product term associated with D3 where the output OUT = 1.

Out = S1S0D3

Test3

Questions from Test3

Shown is a 4:1 Multiplexer. What values of S1S0 select D1 to pass through to the output.

S1S0 = "01"

ICQ11a

Same sitch

ICQ11b

Same situation

ICQ12a

Same situation as ICQ 11

What is the name of time T, shown below (the time before the active edge of the clock that synchronous inputs must not change).

Setup Time

ICQ14

Situation from ICQ 11 ugh

ICQ9

Stuff From ICQ 9

ICQ 4

Stuff from ICQ 4

ICQ 5

Stuff from ICQ 5

ICQ 7

Stuff from ICQ 7

ICQ1

Stuff from ICQ1

ICQ 6

Stuff from ICQ6

ICQ 8

Stuff from ICQ8

ICQ2

Stuff from IQC2

Write the equation for the output SUM for a half adder. The inputs are named A, B. Make a truth table if necessary.

Sum(A,B) = A'B + AB'

Write the SOP equation for the output SUM for a full adder. Hint: Make a truth table.

Sum(A,B,Cin) = AB(Cin) + A'B'(Cin) + A'B(Cin)' + AB'(Cin)'

Sequential

The circuit's output values depend not only on the present input values, but also on the sequence of past values

Combinational

The circuit's output values depend solely on the present combination of input values

Shown is a 4:1 Multiplexer. If the values of S1S0 select D1 to pass through to the output, and D1 = "0", then the output, OUT =

UNKNOWN

Given the following equation: a(w,x,y,z)=∑m(0,1,7) determine the correct minimum SOP equation

a(w,x,y,z) = (w'x'y') + (w'xyz)

Given the following equation: a(w,x,y,z)=∑m(1,4,11,14) determine the correct minimum SOP equation

a(w,x,y,z) = (w'x'y'z) + (w'xy'z') + (wx'yz) + (wxyz')

Given the following equation: a(w,x,y,z)=∑m(1,4,7,10,15) determine the correct minimum SOP equation

a(w,x,y,z) = (w'x'y'z) + (w'xy'z') + (xyz) + (wx'yz')

Given the following equation: a(w,x,y,z)=∑m(1,2,3,7,13) determine the correct minimum SOP equation

a(w,x,y,z) = (w'x'z) + (w'x'y) + (w'yz) + (wxy'z)

Given the following equation: a(w,x,y,z)=∑m(5,6,11,12,14,15) determine the correct minimum SOP equation

a(w,x,y,z) = (w'xy'z) + (xyz') + (wxz') + (wyz)

Given the following equation: a(w,x,y,z)=∑m(1,3,4,5,7,9) determine the correct minimum SOP equation

a(w,x,y,z) = (w'z) + (w'xy') + (x'y'z)

Given the following equation: a(w,x,y,z)=∑m(2,12,14,15) determine the correct minimum SOP equation

a(w,x,y,z) = (wxy) + (w'x'yz') + (wxz')

SImplify the following function F(a,b,c,d) = [(a+ b' + c')' * d]' using DeMorgan's laws.

a+b'+c'+d'

Configure the adder/subtractor to do the following arithmetic. 5 - 4

a3a2a3a0 = 0101. b3b2b3b0 = 0100. sub = 1

The select line each of the muxes which chooses between B and inverted B is also connected to the ___________ input of the adder.

cin

The truth table for a 2 input XNOR gate can be written in minterm notation as

f = m0 + m3

The truth table for a 2 input XOR gate can be written in minterm notation as

f = m1 + m2

A 2:4 decoder has how many outputs.

four

A 4-bit adder can be made from four full adder circuits by cascading them together. The carryout of each full adder becomes the carry in of the next adder. To use four full adders, the least significant adder must have cin tied to _________.

ground (0)

A four bit incrementer can be built from four half adders by cascading them together. The carryout of each half adder becomes the b input of the next adder. To use four half adders as a 4-bit incrementer, the least significant half adder must have input b tied to _______________.

high (1)

For a subtractor built from an adder, the adder is configured to subtract by setting the adder's cin bit to ___

high (1)

A half adder can be used as a(n) ________________ circuit, which adds 1 to a number.

incrementer

A decoder is an n-to-2n device that generates all of the _____________ of a function. (Hint: think about which output is 1 for any given set of inputs. 2:4, 3:8, 4:16, 5:32, etc...; think about what term we learned with kmaps that were associated with a row being 1).

minterms

A 2:4 decoder outputs exactly how many "1"s for a given set of inputs. In other words, if I1I0 = "00", how many outputs are equal to 1. If I1I0 = "11", how many outputs are equal to 1, ...

one

Given the following equation, replace with the equivalent NAND only equation. q = a'b + cd

q = ((a'b)'(cd)')'

A digital system has the following inputs and outputs:Inputs: d: door is open, w: window is open, e: alarm is enabled, n: time-of-day is nightOutput: s: sounds alarmSelect the Boolean equation that describes the indicated goal.Goal: Sound alarm if alarm is enabled, and also the window is open or the door is open.

s = e(w + d)

A multiplexor is a combinational circuit that passes one of multiple data inputs through to a single output. Additional inputs are the controls that determine which input is selected. The control inputs are called______________ inputs.

select

ICQ 10

stuff from ICQ10

GIven the following equation, F(A,B,C,D) = πM(8,12,13,14,15), which of the following equations is the equivalent equation for F(A,B,C,D) in minterm notation decimal format.

Σm(0, 1, 2, 3, 4, 5, 6, 7, 9, 10, 11)

Subtract the following 8-bit, fixed-precision, 2s complement numbers and give the 8-bit result along with the overflow result. 0101 1110 - 1111 0101

0110 1001, overflow did not occur

To do subtraction on the adder/subtractor, the input sub must equal ____________.

1