322 ITEC Tests Summer

Lakukan tugas rumah & ujian kamu dengan baik sekarang menggunakan Quizwiz!

What is the duty cycle of a digital pulse train where the pulse width is 10 ms and the period of the waveform is 90 ms?

11.1%

The ________ prefix on IC's indicates a broader operating temperature range, and the devices are generally used by the military.

54

Which one of the following is not a binary arithmetic function?

Multiplexing

The final step in the PLD programming process is ________.

Select one: a. synthesis b. download Correct c. data entry d. compilation

On a negative-going pulse, the leading edge is the ________.

Select one: *a. negative-going edge Correct b. rising edge c. positive-going edge d. LOW-to-HIGH transition

Boolean algebra was first applied to the analysis of digital circuits by Claude Shannon at Stanford Univ.

Select one: True False Correct

NAND gates cannot be used to construct NOR gates.

Select one: True False Correct

Repeated division-by-10 is used to convert decimal numbers to binary numbers.

Select one: True False Correct

The Karnaugh map below represents the correct implementation of the expression, X = ACD + AB(CD + BC).

Select one: True False Correct

The decimal number system consists of the digits 0-10.

Select one: True False Correct

The effect of an inverted output being connected to the inverting input of another gate is to effectively eliminate one of the inversions, resulting in a single inversion.

Select one: True False Correct

The expressions AB and A + B are equivalent.

Select one: True False Correct

The output of an AND gate is LOW only when all inputs are LOW.

Select one: True False Correct

The output of an OR gate is LOW when at least one input is LOW.

Select one: True False Correct

The output of a NOR gate is LOW only when all inputs are HIGH.

Select one: True False Correct

A LOW placed on the input of an inverter produces a HIGH output.

Select one: True Correct False

A circle, or "bubble," on a distinctive-shape logic symbol indicates a logic inversion.

Select one: True Correct False

A flip-flop is a 1-bit storage device.

Select one: True Correct False

A multiplexer converts parallel data to serial data.

Select one: True Correct False

A sinusoidal waveform is an example of an analog signal.

Select one: True Correct False

DeMorgan's theorem states that X'+Y' = X' Y'

Select one: True Correct False

Figure 4-1 shows the correct logic implementation of the Boolean distributive law.

Select one: True Correct False

For the circuit in Figure 4-1, X = 0 whenever A = 0, regardless of the levels applied to inputs B and C.

Select one: True Correct False

In Boolean algebra, 1 ∙ 0 = 0.

Select one: True Correct False

Serial data is sent along a single conductor, one bit at a time.

Select one: True Correct False

The 1's complement of binary 10111 is 01000.

Select one: True Correct False

The Boolean expression for a three-input AND gate is X = ABC.

Select one: True Correct False

The DIP package style has two parallel rows of through-hole pins.

Select one: True Correct False

The Karnaugh maps provide "cookbook" approaches to simplifying Boolean expressions.

Select one: True Correct False

The NAND gate is an example of combinational logic.

Select one: True Correct False

The PLCC package has J-type leads on all four edges.

Select one: True Correct False

The Sum-of-Product (SOP) form is a standard form of a Boolean expression.

Select one: True Correct False

The amplitude of a digital waveform is the difference in voltage between the LOW and HIGH levels.

Select one: True Correct False

The binary number system is fundamental to all digital computers.

Select one: True Correct False

The clock waveform synchronizes all other waveforms in a circuit.

Select one: True Correct False

The decimal value of binary 1011 can be determined by evaluating the following expression: 1 × 2^ 3 + 0 × 2^ 2 + 1 × 2^ 1 + 1 × 2^ 0 .

Select one: True Correct False

The output of a 2-input Exclusive-NOR gate is 1 when the inputs are equal, or identical.

Select one: True Correct False

The output of a NAND gate is LOW only when all inputs are HIGH.

Select one: True Correct False

The values of an analog signal flow smoothly from one to the next.

Select one: True Correct False

When both inputs to a 2-input OR gate are both LOW, the output is LOW.

Select one: True Correct False

When the inputs to a 2-input AND gate are both HIGH, the output is HIGH.

Select one: True Correct False

When the inputs to a 2-input AND gate are both LOW, the output is LOW.

Select one: True Correct False

X = ABC + BCD is in the form of a sum-of-products expression.

Select one: True Correct False

Which of these truth tables represents the Exclusive-NOR gate?

Select one: a. (A) Correct b. (B) c. (C) d. (D)

In binary multiplication, 1 × 1 = ________.

Select one: a. 0 b. 1 Correct c. 1 with a carry of 1 d. 0 with a carry of 1

Which of the following is a correct form of Boolean multiplication?

Select one: a. 0 + 1 = 1 b. 0 + 1 = 0 c. 0 ∙ 1 = 1 d. 0 ∙ 1 = 0 Correct

The lowest single digit value in the hexadecimal number system is ________.

Select one: a. 0 Correct b. 15 c. 8 d. 4

Which of the following is a correct form of Boolean addition?

Select one: a. 0 ∙ 0 = 0 b. 0 ∙ 1 = 0 c. 0 + 1 = 0 d. 0 + 1 = 1 Correct

In binary division, 1000 ÷ 0100 = ________.

Select one: a. 0010 Correct b. 0100 c. 0001 d. None of these Feedback

What is the BCD form of 735 in even parity?

Select one: a. 0101001101110 b. 1 011100110101 correct c. 0111001101011 d. 1010100110111

In binary addition, 1 + 0 = ________.

Select one: a. 1 with a carry of 1 b. 0 with a carry of 0 c. 0 with a carry of 1 d. 1 with a carry of 0 Correct

In the decimal value 42.56, the weight of the numeral 6 is ________.

Select one: a. 10 -2 Correct b. 6 × 2 -2 c. 0.06 d. 10 -1

How many binary digits are required to count to decimal 100?

Select one: a. 100 b. 3 c. 2 d. 7 Correct

What is the BCD form of 438 in odd parity?

Select one: a. 1010000111000 Correct b. 0100001110001 c. 0100000110100 d. 1000001101000

In binary addition, 0111 + 0001 = ________.

Select one: a. 111 b. 1001 c. 1110 d. 1000 Correct

Perform the following binary subtraction: 101 - 11 = ________.

Select one: a. 111 b. 001 c. 010 Correct d. 110

Convert decimal 59.72 to BCD.

Select one: a. 1110.11 b. 0101100101110010 c. 111011 d. 01011001.01110010 Correct

In binary multiplication, 11 × 110 = ________.

Select one: a. 11111 b. 11001 c. 10110 d. 10010 Correct

The arrow in the figure below points to pin number ________.

Select one: a. 12 b. 13 c. 4 d. 5 Correct

The highest decimal value that can be represented as a 4-bit binary number is ________.

Select one: a. 15 Correct b. 8 c. 32 d. 7

The arrow in the figure below points to pin ________.

Select one: a. 17 Correct b. 4 c. 5 d. 16

The ________ series of IC's are pin, function and voltage-level compatible with the 74 series IC's.

Select one: a. 2N b. HCT Correct c. CMOS d. ALS

How many gates, including inverters, are required to implement the equation, X = ACD' + A'B(CD+BC) after simplification with a Karnaugh map? (Note: The instructor may require you to show your work on this problem.)

Select one: a. 3 b. 9 c. 5 d. 7 Correct

Convert hexadecimal 8B3F to binary.

Select one: a. 35647 b. 1000101100111111 Correct c. 1011001111100011 d. 011010

The fan-out for standard bipolar logic devices is ________.

Select one: a. 5 b. 2 c. 10 Correct d. 1

How many 2 input gates and inverters, are required to implement the equation, X=ACD'+A'B(CD+BC) before simplification?

Select one: a. 7 B. 5 c. 10 Correct d. 3

The approximate duty cycle for the digital waveform below is ________.

Select one: a. 80% b. 20% Correct c. 50% d. 30% Feedback

Which of the examples below expresses the associative law of addition?

Select one: a. A + (B + C) = A + (BC) b. A + (B + C) = (A + B) + C Correct c. ABC = A + B + C d. A(BC) = (AB) + C

For the network shown below, the boolean expression for X is ________.

Select one: a. A + BC + D b. (AC + BC)D c. ((A + B) ∙ C) + D Correct d. D(A + B + C)

Which rule of Boolean algebra does the figure below represent?

Select one: a. A ∙ 1 = A Correct b. A ∙ 0 = 0 c. A + 0 = A d. A + 1 = 1

The relationship between a NAND gate and a negative-OR gate is expressed by ________.

Select one: a. AB = + b. A + B = A + B c. (AB)' = A' + B' Correct d. A'B' = A' + B'

A circuit that converts an digital signal to an analog waveform is commonly called a(n) ________.

Select one: a. ADC b. DAC Correct c. CAD d. PLD

This is the timing diagram for a 2-input ________ gate.

Select one: a. AND b. OR c. Exclusive-OR d. NAND Correct

The device in Figure 1-3(A) is a(n) ________ function.

Select one: a. AND Correct b. NOT c. OR d. AND/OR

This is the logic symbol for a(n) ________.

Select one: a. AND gate b. Inverter c. OR gate Correct d. None of the above

This is the logic symbol for a(n) ________.

Select one: a. AND gate b. NAND gate c. OR gate d. NOR gate Correct

This is the truth table for a(n) ________.

Select one: a. AND gate b. NOR gate c. OR gate Correct d. NAND gate

This is the rectangular outline symbol for a(n) ________.

Select one: a. AND gate Correct b. NAND gate c. OR gate d. None of the above

The figure below represents one line from the truth table for a two-input NAND gate. A B X 1 0 ? For the inputs shown, what is the value of X?

Select one: a. B b. 0 c. 1 Correct d. not A

Which of the following is not a standard digital code?

Select one: a. BCD b. Gray c. ASCII d. ARRL Correct

Which of the following combinations cannot be combined into Karnaugh-map groups?

Select one: a. Corners in the same row b. Corners in the same column c. Overlapping combinations d. Diagonal corners Correct

Which circuit in Figure 5-4 represents the NOR implementation of an AND gate?

Select one: a. Figure (A) b. Figure (B) c. Figure (C) d. Figure (D) Correct

Which circuit in Figure 5-4 represents the NOR implementation of an inverter?

Select one: a. Figure (A) b. Figure (B) c. Figure (C) Correct d. Figure (D)

Which figure is the equivalent of the Reference Circuit?

Select one: a. Figure (A) b. Figure (B) c. Figure (C) Correct d. Figure (D)

Which of the circuits below is equivalent to the Reference Circuit?

Select one: a. Figure (A) b. Figure (B) c. Figure (C) Correct d. Figure (D)

Which of the figures is the correct NAND logic implementation of the expression, X = ABC + D'E?

Select one: a. Figure (A) b. Figure (B) c. Figure (C) Correct d. Figure (D)

Which figure below represents AND-OR logic?

Select one: a. Figure (A) Correct b. Figure (B) c. Figure (C) d. Figure (D)

Which of the figures is the DeMorgan equivalent of the Reference Circuit shown below?

Select one: a. Figure (A) Correct b. Figure (B) c. Figure (C) d. Figure (D)

Which circuit in Figure 5-3 represents the NAND implementation of an AND-OR function?

Select one: a. Figure (A). Correct b. Figure (B). c. Figure (C). d. Figure (D). Feedback

rnaugh maps below represents the expression, X = AC + BC + B?

Select one: a. Figure I b. Figure II c. Figure III Correct d. Figure IV Feedback

This is the rectangular outline symbol for a(n) ________.

Select one: a. Inverter b. AND gate c. OR gate Correct d. None of the above

What is the primary motivation for using Boolean algebra to simplify logic expressions?

Select one: a. May make it easier to understand the circuit. b. May reduce the number of inputs required. c. May reduce the number of gates. d. All of the above are correct. Correct

Which circuit converts data from serial form to parallel form?

Select one: a. Multiplexer b. Demultiplexer Correct c. Comparator d. Encoder

Which one of the following is not a binary arithmetic function?

Select one: a. Multiplexing Correct b. Add c. Subtract d. Division

The symbol shown in Figure 4-2 is a(n) ________ gate.

Select one: a. NAND b. AND-OR c. OR d. AND Correct

This is the truth table for a(n) ________.

Select one: a. NAND gate b. AND gate Correct c. NOR gate d. OR gate

This is the truth table for a(n) ________.

Select one: a. NOR gate Correct b. AND gate c. OR gate d. NAND gate

This is the timing diagram for a 2-input ________ gate.

Select one: a. OR Correct b. AND c. Exclusive-OR d. NAND

The symbol shown in Figure 4-3 is a(n) ________ gate.

Select one: a. OR Correct b. AND-OR c. AND d. Exclusive-OR

This is the rectangular outline symbol for a(n) ________.

Select one: a. OR gate b. AND gate c. NAND gate d. Exclusive-OR gate Correct

This is the logic symbol for a(n) ________.

Select one: a. OR gate b. NAND gate c. AND gate Correct d. None of the above

What is the indication of a short to ground in the output of a driving gate?

Select one: a. Only the output of the defective gate is affected. b. The node is stuck in the LOW state. Correct c. The affected node will be stuck in the HIGH state. d. There is a signal loss to all load gates.

What is the indication of a short on the input of a load gate?

Select one: a. Only the output of the defective gate is affected. b. There is a signal loss to all gates on the node. c. The affected node will be stuck in the LOW state. d. Both B and C are correct. Correct

Which output waveform is correct for the circuit input waveforms shown?

Select one: a. Output (A) b. Output (B) c. Output (C) Correct d. Output (D)

The package style in Figure 1-4(B) is a(n) ________.

Select one: a. SOIC b. FP c. PLCC Correct d. LCCC

What is the indication of an open in the output of a driving gate?

Select one: a. The affected node will be stuck in the HIGH state. b. There is a signal loss to all load gates. Correct c. Only the output of the defective gate is affected. d. The affected node will be stuck in the LOW state.

Which of the following is an important feature of the sum-of-products form of expressions?

Select one: a. The delay times are greatly reduced over other forms. b. All logic circuits are reduced to nothing more than simple AND and OR gates. c. The maximum number of gates that any signal must pass through is reduced by a factor of two. d. No signal must pass through more than 2 gates, not including inverters. Correct

A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?

Select one: a. The gate may be a tri-state device. b. The dim indication is the result of a bad ground connection on the logic probe. c. The output of the gate appears to be open. Correct d. The dim indication on the logic probe indicates that the supply voltage is probably low.

Based on the indications of probe A in Figure 5-5, what is wrong, if anything, with the circuit?

Select one: a. The logic probe is unable to determine the state of the circuit at that point and is blinking to alert the technician to the problem. b. The output appears to be LOW, but is being pulsed by the pulser. c. The output appears to be shorted to Vcc, but is being pulsed by the pulser. d. Nothing appears to be wrong at that point. Correct

Which statement below best describes a Karnaugh map?

Select one: a. Variable complements can be eliminated by using Karnaugh maps. b. Karnaugh maps provide a cookbook approach to simplifying Boolean expressions. Correct c. A Karnaugh map can be used to replace Boolean rules. d. The Karnaugh map eliminates the need for using NAND and NOR gates.

The simplest output equation for Figure 5-2 is ________.

Select one: a. X = AB'C + BC'D b. X = A'(BCD) c. X = A'BC'D Correct d. X = A'(BC' + CD)

Which type of gate can be used to add two bits?

Select one: a. XNAND b. XOR Correct c. NAND d. NOR

Which of the following is a form of DeMorgan's theorem?

Select one: a. XY all bar = X bar + Y bar Correct b. X + 0 = 0 c. X + Y = X + Y d. X(l) = X

The point identified as 'X' in this figure is referred to as ________.

Select one: a. a reference point b. a node Correct c. common d. a tie point

Two kinds of data selectors are ________ and ________.

Select one: a. adders, subtractors b. encoders, decoders c. comparators, registers d. multiplexers, demultiplexers Correct

A Karnaugh map ________.

Select one: a. allows any circuit to be implemented with just AND and OR gates b. produces the simplest sum-of-products expression c. gives an overall picture of how the signals flow through the logic circuit d. provides a means of reducing complex Boolean expressions. Correct

When performing binary addition using the 2's complement method, an overflow can occur if ________.

Select one: a. both numbers have the same sign Correct b. one number is negative and the other is positive c. both numbers have the same magnitude d. the second number is much greater than the first

The first step in the PLD programming process is ________.

Select one: a. compilation b. synthesis c. download d. data entry Correct

Occasionally, a particular logic expression will be of no consequence in the operation of a circuit, such as in a BCD-to-decimal converter. These result in ________ terms in the K-map and can be treated as either ________ or ________, in order to ________ the resulting term.

Select one: a. don't care, 1s, 0s, simplify Correct b. spurious, 1s, 0s, simplify c. spurious, ANDs, ORs, eliminate d. duplicate, 1s, 0s, verify

The time from one leading edge on a digital waveform to the next is the waveform ________.

Select one: a. fall time b. pulse width c. rise time d. period Correct

The output of a gate has an internal short; a current tracer will ________.

Select one: a. identify the defective gate b. be able to identify the defective load node c. probably not be able to locate the problem d. show whether the gate is shorted to Vcc or ground Correct

The output of a gate has an internal short; a current tracer will ________.

Select one: a. identify the defective gate b. be able to identify the defective load node c. probably not be able to locate the problem Correct d. show whether the gate is shorted to Vcc or ground

This is the rectangular outline symbol for a(n) ________.

Select one: a. inverter b. Exclusive-NOR gate c. NAND gate d. NOR gate Correct

The symbol shown below is a(n) ________, and the output will be ________ for the input shown.

Select one: a. inverter, 1 b. buffer, 1 c. buffer, A d. inverter, not A Correct

All digital systems which perform arithmetic operations must indicate ________ and ________ for numbers.

Select one: a. magnitude, base b. sign, magnitude Correct c. sign, base d. size, base

The Hamming code is a(n) ________.

Select one: a. octal version of the BCD code b. an updated version of the ASCII code c. encryption code d. error correction code Correct

The cyclic redundancy check is used to detect ________.

Select one: a. one-bit and two-bit parity errors b. information that is repeated c. one-bit and two-bit data transmission errors Correct d. operation cycles that are performed more than once

On a digital waveform, the transition time from a LOW level to a HIGH level is called ________.

Select one: a. pulse width b. period c. fall time *d. rise time Correct

A periodic digital waveform ________.

Select one: a. repeats itself at a fixed interval b. has both a HIGH and LOW levels c. has an amplitude d. All of the above Correct

On a digital waveform, the transition time from a HIGH level to a LOW level is called ________.

Select one: a. rise time b. period c. pulse width d. fall time Correct

The netlist is generated during the ________ phase of the PLD programming process.

Select one: a. synthesis Correct b. compilation c. data entry d. download

For an ideal digital pulse, transition times are ________.

Select one: a. zero Correct b. measured between 0 and 90% of the amplitude c. infinite d. measured between 10% to 90% of the amplitude

The largest single digit in the decimal number system is ________.

Select one: a. ∞ b. 10 c. 9 Correct d. 1

Which circuit converts coded information into a noncoded form?

a. Encoder b. Decoder Correct c. Comparator d. Multiplexer

Which of the examples below expresses the commutative law of multiplication?

b. AB = BA Correct

The term "hex inverter" refers to ________.

b. six inverters in a single package Correct

The output generated by an OR gate is HIGH ________.

b. when at least one input is HIGH

The expression for a 3-input OR gate is ________.

d. A + B + C Correct

Which of the examples below expresses the distributive law?

d. A(B + C) = AB + AC Correct

Which of the following statements accurately describes the Gray code?

d. All of these statements accurately describe the Gray code. Correct

Two kinds of data selectors are ________ and ________.

d. multiplexers, demultiplexers

A Karnaugh map ________.

d. provides a means of reducing complex Boolean expressions. Correct

On a digital waveform, the transition time from a HIGH level to a LOW level is called ________.

fall time

Boolean multiplication is symbolized by A + B.

false

DeMorgan's theorem states that XY = X + Y.

false

The OR gate performs as switches wired in series.

false

When a two-input NAND gate has inputs of 1 and 0, the output is 0.

false

When mapping an SOP expression using a Karnaugh map a 0 is placed in each cell corresponding to the value of the product term.

false

In Boolean algebra, the expression "________" means the complement of A.

not A

On a digital waveform, the transition time from a LOW level to a HIGH level is called ________.

rise time

A waveform that repeats itself at a fixed interval is called a periodic waveform.

true

Digital data can be processed and transmitted more efficiently and reliably than analog information.

true

The PLCC package has J-type leads on all four edges.

true

The Product-of-Sum (POS) form is a standard form of a Boolean expression.

true

The complement of 1 is 0.

true

When input to a logic inverter is HIGH, the output is LOW.

true

When the both inputs to a 2-input OR gate are both HIGH, the output is HIGH.

true


Set pelajaran terkait

health and wellness final exam review

View Set

Business Management and Administration

View Set

Week 5 (Readings and Video Notes)

View Set

CCNA1 Chapter 8: Subnetting IP Networks

View Set

RN Targeted Medical Surgical Endocrine Online Practice 2023

View Set