CDA 3103 Final Exam Review
Formula for bits in Virtual Address
(# virtual pages * bytes per page) -Multiply in base 2, the power gives you # of bits
The 3 parts of the Von Neumann Architecture are:
-CPU -Memory -I/O system
-At this level, a control unit decodes and executes instructions and moves data through the system.
Control Level (Level 1)
Computer Level 0
Digital Logic Level
Computer Level 2
Machine Level
________ machine:-Outputs depends on the present state
Moore
The level of the computer hierarchy where an operating system functions is the ____________.
System Software Level (Level 3)
The approach of using a combination of memory types to provide the best performance at the best cost is called:
hierarchical memory
When the requested data resides in a given level of memory, we call this a ________
hit
The tag field of a main memory address is used to determine:
if the cache entry is the desired block
•________________ replacement -Replace oldest block in set -One counter per set (0 to m - 1): specifies oldest block to replace
•First In First Out (FIFO) replacement -Replace oldest block in set
Principle of Equivalence of Hardware and Software
Any task done by software can also be done using hardware, and any operation performed directly by hardware can be done using software
Computer Level 4
Assembly Language Level
Acts upon assembly language produced from level 5, as well as instructions programmed directly at this level
Assembly Language Level (Level 4)
Direct Mapped Cache Offset
Block size Ex: Block size = 32 bytes = 2^5 = 5-bit offset
Formula for bits in Page frame number
# of page frames in base 2, Ex: 4 page frames = 2^2 = 2 bits for page frame number
Formula for bits in Virtual page number
# of pages in base 2, Ex: 8 pages = 2^3 = 3 bits for virtual page number
Formula for bits in Physical Address (virtual)
(Page frames * Bytes per page) -Multiply in base 2, the power gives you # of bits
At the most basic level, a computer consists of these three pieces:
-Processor -Memory -Data input and output
_______ RAM is used for cache memory _______ RAM is used for main memory
-Static -Dynamic
The _________________ leads to the von Neumann bottleneck, the limited throughput (data transfer rate) between the _______________________..
-single data path -CPU and main memory
1 MHz =
1,000,000 Hz
5 main components of the von Neumann model:
1. Processing unit (ALU & registers) 2. Control unit (PC & IR) 3. Memory unit 4. Input unit 5. Output unit
A kilobyte represents what power of two?
10
How many nanoseconds are in one microsecond?
1000
In 1 terabyte there are ___________ kilobytes.
10^9
How many bytes are in 2 GB?
2 x 2^30 B = 2^31 B
As a power of two, there are _______ kilobytes in a megabyte.
2^10
As a power of two, there are _____ megabytes in a terabyte.
2^20
3.5 gigabytes to kilobytes
3.5 x 10^6 kB
How many bytes are in 5 megabytes?
5 x 10^6 bytes
The ___________________________ is the agreed-upon interface between all the software that runs on the machine and the hardware that executes it. It allows you to talk to the machine.
Instruction set architecture
•_________________________ -Replace block that has been unused for the longest time -Order blocks within a set from least to most recently used -Update ordering of blocks on each cache hit -With m blocks per set, there are m! possible permutations
Least Recently Used (LRU)
-Also known as the Instruction Set Architecture (ISA) Level. -Consists of instructions that are particular to the architecture of the machine. -Programs written in machine language need no compilers, interpreters, or assemblers.
Machine Level (Level 2)
•_____________: the mechanism by which virtual addresses are translated into physical ones.
Mapping
_____________ machine:-Input changes can cause immediate output changes (asynchronous)
Mealy
_____________ machine:-Output depends on the present state as well as the present input.
Mealy
_____________ machine:-Outputs change synchronously with state changes
Moore
____________ Law says that "The density of transistors in an integrated circuit will double every year."
Moore's
Direct Mapped Cache Index
Number of blocks Ex: # of blocks = 2^3 = 3-bit index
•________________: the equal-size chunks or blocks into which main memory (physical memory) is divided.
Page frames
______________: the chunks or blocks into which virtual memory (the logical address space) is divided, each equal in size to a page frame
Pages
•____________: the process of copying a virtual page from disk to a page frame in main memory.
Paging
•___________ address - the real address in physical memory.
Physical
-The ________________ monitors the execution of instructions. It keeps track of which instruction is being executed and what the next instruction will be.
Program counter
The basic difference between RAM and ROM memory is:
RAM is read/write while ROM Is read only
Hertz =
clock cycles/second (frequency)
______ is non-volatile memory that permanently stores instructions for your computer.
ROM
•____________ replacement -Candidate blocks are randomly selected -One counter for all sets (0 to m - 1): incremented on every cycle
Random
______________ Law says that "The cost of capital equipment to build semiconductors will double every four years."
Rock's
_________is very fast memory, and it doesn't need to be refreshed like DRAM does. It is used to build cache memory,
SRAM
•___________ Locality (in space) -Tendency to access contiguous instructions/data in memory -Sequential execution of Instructions -Traversing arrays element by element
Spatial
Computer Level 3
System Software Level
-Controls executing processes on the system. -Protects system resources. -Assembly language instructions often pass through Level 3 without modification.
System Software Level (Level 3)
•____________ Locality -If an item is accessed, it will probably be accessed again soon -Same loop instructions are fetched each iteration -Same procedure may be called and executed many times
Temporal
In the von Neumann model, explain the purpose of the following components: Central processing unit:
The CPU is the primary component of the von Neumann model. The purpose of the CPU is to execute instructions and perform different types of calculations. It consists of several components including an arithmetic & logic unit, a control unit, and registers.
In the von Neumann model, explain the purpose of the following components: Arithmetic logic unit:
The arithmetic logic unit is a crucial component of the CPU. It's responsible for performing most of all the arithmetic and logical operations of a computer. It performs operations including addition, subtraction, multiplication, division, as well as logical comparisons like AND, OR, NOT.
There is _______________________ between matters related to computer organization and matters relevant to computer architecture.
no clear distinction
•Caches exploit ____________________ by ... -Moving blocks consisting of multiple contiguous words
spatial locality
•Caches exploit __________________ by ... -Keeping recently accessed data closer to the processor
temporal locality
Computer Level 5
High Level Language Level
•__________________: -Writes update cache only -Cache control bits: Valid and Modified bits are required -Modified cached data is written back to memory when replaced -Uses less memory bandwidth than write-through and less power
Write Back
•__________________: -Writes update cache and lower-level memory -Cache control bit: only a Valid bit is needed -Memory always has latest data, which simplifies data coherency
Write Through
2's Complement Binary Data Range
[ -2^(n-1), 2^(n-1)-1 ]
1's Complement Binary Data Range
[ -2^(n-1)-1, 2^(n-1)-1 ]
Signed Magnitude Binary Data Range
[ -2^(n-1)-1, 2^(n-1)-1 ]
Unsigned Binary Data Range
[ 0, 2^n-1 ]
Cache memory improves performance by improving memory __________ while virtual memory improves performance by increasing memory _____________.
access time/address space
While designing a computer system, _________________ is considered first.
architecture
A ___________________ decodes and executes instructions and moves data through the system.
control unit
In the von Neumann architecture, the central processing unit (CPU) consists of registers, an arithmetic-logic unit (ALU), and a(n) ______________
control unit
The average time required to reach a memory storage location and retrieve its contents is called:
effective access time
Formula for bits in Page offset
equal to page size, Ex: 64 bytes per page = 2^6 = 6 bit offset
•Segmentation is subject to ____________ fragmentation, which occurs when contiguous chunks of memory become broken up as segments are allocated and deallocated over time.
external
-The _____________________ is used to hold the instruction that is currently being executed.
instruction register (IR)
Paging is subject to _____________ fragmentation because a process may not need the entire range of addresses contained within the page
internal
A ___________________ is a program written in a low-level language that is implemented by the hardware.
microprogram
The offset field of a main memory address is used to determine:
the location of the desired data in the cache block
What characteristic of RAM makes it unsuitable for permanent storage?
volatile
___________ memory holds the stored data as long as it is powered on.
volatile
The level with which we interact when we write programs in languages such as C, Pascal, Lisp, and Java
High-Level Language Level (Level 5)
_______ microseconds = 1000 nanoseconds.
1
__________________ is the logical and abstract of system implementation as seen by the programmer.
Computer architecture
___________________ deals with high-level design issues.
Computer architecture
_______________ deals with the components of a connection in a system.
Computer organization
________________ encompasses all physical apsects of computer systems.
Computer organization
________________________ is concerned with the structure and behavior of a computer system as seen by the user.
Computer organization
Computer Level 1
Control Level
-_________ consists of capacitors that slowly leak their charge over time. Thus, they must be refreshed every few milliseconds to prevent data loss.
DRAM
Which of the following types of memory needs to be refreshed periodically to maintain its data?
DRAM
-This level is where we find digital circuits (the chips). -Digital circuits consist of gates and wires. -These components implement the mathematical logic of all other levels.
Digital Logic Level (Level 0)
The level of the computer hierarchy that is composed of gates and wires is the
Digital logic level (Level 0)
•_______________: memory that becomes unusable.
Fragmentation
Clock speeds in today's microprocessors are measured in:
Ghz
In the von Neumann model, explain the purpose of the following components: Control unit:
The control unit is what coordinates and controls the operations of the other CPU components. The control unit helps manage the flow of instructions between the ALU, memory, and input and output devices. It's responsible for maintaining the overall control and synchronization of the computer system.
In the von Neumann model, explain the purpose of the following components: Program counter:
The program counter is a register within the CPU that stores the memory address of the next instruction to be fetched and executed. After fetching an instruction, the program counter gets updated to point to the next instruction.
Feedback path and memory elements are the parts of sequential circuits True or False
True
Computer Level 6
User Level
Program execution and user interface level, the level with which we are most familiar, executable programs
User Level (Level 6)
______________ memory provides greater memory capacity, without the expense of adding main memory.
Virtual
