CIS 350 exam 2 MC

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false

. In a master-slave processing system, a slave controls all resources and scheduling.

instructions data addresses control signals

A bus can carry __________________.

cache controller

A hardware ____________________ checks the tags to determine of the memory location of the request is presently stored within the cache.

streaming.

A key to the efficient operation of a GPU is the ability to dispatch instructions to the CPU cores in rapid succession, a process commonly called

2

A mirrored array requires a minimum of _________ disk drives.

DirectX.

A proprietary standard, developed by Microsoft to render 2-D and 3-D objects is known as

redundant array of independent/inexpensive disks

A shortcut R.A.I.D. stands for

majority logic.

A special fault-tolerant computer system uses an array of 3 disks. The following logic is used to detect errors: If the data from all three disks is identical, then it is safe to assume that the integrity of the data is acceptable. If the data from one disk differs from the other two, then accept the data where both match and flag the other as an error. This logic is known as

500 GB

A typical capacity of a hard disk/SSD in a modern personal computer is about ___________.

microseconds

Access time (for read) to flash memory/solid state drive is between 25 and 100 _____________________.

almost instant

Access time to registers is _________________.

disk controller.

An I/O controller that is designed to control hard disks is called a

direct memory access.

An I/O technique that transfers block data directly between the I/O controller and computer memory, is called

disk data is always transferred in blocks, never as individual bytes as with the keyboard.

An important difference between the I/O requirements of keyboards and disk drives is that

Ethernet.

Beowulf clusters are simple, highly configurable clusters designed to provide high performance at low cost. Beowulf clusters consist of multiple computers connected together by a dedicated, private

built from standard off-the-shelf parts.

Blade servers are computers mounted on a board similar to a motherboard that can be plugged into connectors on a rack. The blades themselves are

false

Cache memory is like virtual memory and it does not exist physically.

interrupt lines.

Computers provide interrupt capability by providing one or more special control lines to the central processor known as

synergy

Considering the computer system as a whole allows further advances in performance, which result from system integration. This is known as

true color system.

Displays that use 256 (Red) × 256 (Green) × 256 (Blue) different colors on the screen is sometimes described as a

write back

During the ______________ operation writes to memory are made only when a cache line is actually replaced.

abnormal events.

Events related to problems or special conditions within the computer system itself, like divide by zero, or attempting to execute a nonexistent op code, are called

interrupts.

External events like keyboard input, mouse clicks, printer "out of paper" messages, and power failures are handled by

have the ability to recover gracefully from hardware or software failures and still maintain a reasonable service

Fault-tolerant systems

status

Flags are ____________ registers used to keep track of special conditions such as overflow

constant angular velocity (CAV)

Hard disks generally store data in a _____________ format

32

If the instruction's operation code is 5 bits long, how many unique instructions can it represent?

1048576

If the size of the MAR is 20 bits, it can address __________________ unique memory locations.

ethernet

In _________________ network, signals sent by a particular computer on a network are received by every other computer connected to the network.

memory interleaving

In _________________________ method, memory is partitioned into subsections, each with its own memory address register (MAR) and memory data register (MDR).

4

In a 4-disk mirrored array access time could be reduced _________ times as disks use independent controllers.

node.

In a cluster of loosely coupled computers, each computer in the cluster is called a

outer tracks move the fastest

In a disk drive where the drive motor turns at constant angular velocity, which is true of the linear velocity?

parity checking

In a striped disk array, one disk is usually used for ______________________,

motherboard

In most computer systems, the CPU, memory, and other major components are mounted to wiring on a printed circuit board known as a(n)

true

In symmetrical multiprocessing, each CPU has equal access to resources.

page

In technical specifications for flash memory, the read/write block is called a

registers, cache memory, RAM, disk, tape

In the interest of increasing the execution speed of instructions, the order in which the CPU finds data and instructions is as follows:

privileged instructions

Instructions that are intended for use by an operating system program, but not by an application program, are called

hardware or software

Interrupts originate in the computer __________________________________.

nonmaskable.

Interrupts that can never be temporarily disabled by program instructions are called

byte

On IBM computers, each __________ has the unique address.

tracks

On disk, data are recorded on concentric circles called

6

On the IBM/z Series computers, interrupts are divided into ______ classes.

rotational latency time.

Once the hard-disk read/write head is located over the desired track, the read/write operation must wait for the disk to rotate to the beginning of the correct sector. This time is called

high priority events.

Power failures, internal time-sensitive events, or external events that are time sensitive will trigger interrupts that are

logical physical

Programs always use ___________ addresses, computer hardware needs __________ addresses.

medium access control protocols

Protocols that describe a computer's communication with the physical layer network are called

general purpose registers

Relatively slow data memory accesses could be reduced by increasing the number of _______________________.

magnetic and optical disk storage devices.

SATA stands for Serial Advanced Technology Attachment; it replaces an older standard, IDE (Integrated Drive Electronics), and is used primarily as an interface for

A way of buffering large amounts of data

Since many interrupts exist to support I/O devices, most of the interrupt handling programs are also known as

secondary storage.

Storage not immediately available to the CPU is referred to as

grid computing

Systems that use the spare processing capacity of computers connected to a network is called

northbridge.

The CPU and memory are interconnected through a memory bridge sometimes called the

Firewire.

The IEEE 1394 bus is sometimes referred to as

interfaces

The MAR and MDR act as _________________ between CPU and memory.

isochronous data transfer.

The USB protocol allows packets to be scheduled for delivery at regular time intervals. This technique is known as

MAR

The ___________________ holds the address of a memory location at which the instruction or data is stored.

ALU

The _____________________ executes an instruction and performs arithmetic and logic operations.

program/ instruction counter

The _____________________ stores an address of the current/next instruction to execute

very-large-scale integrated circuits

The abbreviation "VLSI circuits" stands for _______________________________________.

system bus

The circuitry that connects the CPU to memory and to all the various modules that control I/O devices is called the

19.42

The computer screen is a rectangle of the sides of 11 and 16 inches. What is the approximate size (in inches) of the diagonal?

synergy

The concept known as __________________ means that individual components of the computer are designed to work together in such a way that overall performance is enhanced beyond the performance of each component

STO

The following sequence of steps in the instruction cycle: PC MAR MDR IR IR [address] MAR A MDR PC+1 PC represents the ______ instruction

in a buffer.

The incompatibilities in speed between the various devices and the CPU make I/O synchronization difficult, especially if there are multiple devices attempting to do I/O at the same time. To handle these problems data is usually stored

channel subsystem.

The input-output architecture based on separate I/O processors and used on IBM mainframes is known as a(n)

bridges

The interfaces between buses are called _____________.

clustering.

The method of connecting loosely coupled computers together with a dedicated communication channel or link that passes messages between machines is called

interrupts.

The method used to communicate events that need special attention to the CPU are known as

INT.

The mnemonic for the x86 architecture instruction that simulates an interrupt is

16 GB

The most common size of RAM in contemporary PC computers available on the market now is close to

an I/O device and memory.

The primary purpose of channel programs is to transfer data using DMA between

operating system

The privileged instructions such as SVC 33 (request to increase storage) or HLT can be issued within the application program, but program control is always surrendered to ________________

shared-nothing, shared-disk

There are two primary models used for clustering, the _________ model, and the _________ model.

50

Thunderbolt connections can be made using either copper or fiber optic cable. The optic cable will work over distances of up to ______ meters.

false

To be effective, cache operations must be completely controlled by software.

hierarchical

USB uses a _________________ connection system, in which hubs are used to provide multiple connection points for I/O devices.

System reliability

What system performance attribute is most increased by using a redundant array of independent disks (RAID)?

cylinder

When a disk drive has multiple platters, the heads on each surface all line up. The set of tracks for all the surfaces form a geometric shape similar to a

process control block.

When an interrupt causes temporary suspension of the program in progress, all the pertinent information about the program being suspended, including the location of the last instruction executed, and the values of data in various registers are stored in an area of memory known as the

vectored interrupt.

When the device generating the interrupt request identifies its address as part of the interrupt, it is called

programmed I/O architecture

Which architecture is not suitable for fast data transfer between memory and peripheral devices?

OLED

Which display technology consists of a thin display panel that contains red, green, and blue LEDs for each pixel with transistors for each LED that generate electrical current to light the LED?

external interrupt from the timer (when the program exceeds the slice of the CPU time allocated to it.

Which interrupt originates in the computer hardware?

liquid crystal display LCD

Which of the following display technologies is still the prevalent means of displaying images?

A way of buffering large amounts of data

Which of the following is not a function of how interrupts are used?

increased security

Which of the following is not a reason to create clusters of computers?

SVC/HLT

Which of the following is the privileged instruction?

stack

Which of the following is the privileged instruction?

Ink-jet printers

Which of the following printing technologies boils ink in a nozzle to spray a tiny droplet onto the paper?

parallelization

With the exception of the Cell Engine, current GPUs are generally based on maximizing the number of operations that can take place at the same time, or ______________.

track

With the hard drive read/write head in a fixed position, it traces out a circle on the disk surface as the disk rotates; this circle is known as a

phonemes.

With voice input data, the translation process requires the conversion of voice data into sound patterns known as

parallel

_________________ buses are subject to radio-generated electrical interference which limits their speed and length.

I/O Modules or interfaces

___________________ translate data and signals to the form acceptable (understandable) to a peripheral device and control the peripheral device.

branching stalling

_______________________________ create problems in pipelining

channel

establishes communication with a peripheral device and assumes the responsibility for I/O transfer releases the main processor to do other tasks sends an interrupt to the main processor to tell it that the I/O transfer is finished


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