Digital and Microprocessors

GAL

(generic array logic) is a device that is basically a PAL that can be reprogrammed many times. It consists of a reprogrammable array of AND gates and a fixed array of OR gates with programmable outputs.

PAL

(programmable array logic) is a device that can be programmed one time. It consists of a programmable array of AND gates and a fixed array of OR gates

LED

1.2 - 4 volts Red 1.4 - 2 volts cathode different or shorter side or L inside Generic uses 10mA 300 ohm resistor connected to 5v logic

Generations

1st Vacuum tubes 2nd transistors 3rd intergraded Circuits 4th microprocessors

Typical maximum fan out current for a gate is.

20mA

Gray Code

4 bits binary, Only 1-bit changes each time, 9 is the highest admissible mark. less efficient but more precise. Minimizes errors.

Positive Logic

= '1' = asserted high = active state. on 0 = off

Sign Bit

A binary bit that is added to the leftmost position of a binary number to indicate whether that number represents a positive or a negative quantity. A 0 sign bit indicates a positive number, and a 1 sign bit indicates a negative number.

CPLD

A complex programmable logic device that consists basically of multiple SPLD arrays with programmable interconnections.

Pullup Resistor

A resistor connected between a signal conductor and a positive power supply voltage to ensure that the signal will be a valid logic level if external devices are disconnected or high-impedance is introduced. Connected directly to Vcc (+5V) for a constant high "1" input (AND and NAND gates).

Pulldown Resistor

A resistor is used to provide a "low" (0) logic level in the event of a floating signal source.unused pins connected directly to ground (0V) for a constant low "0" input, (OR and NOR gates)

Ripple Counters

Asynchronous -operate at various modulus useing the CLR input

CLR and PRE

Asynchronous inputs to a Flipflop. Affect the state independent of the clock.

Buffer

Common Collector Amplifier 1.Protection from high input voltage & current 2. Driver: to maintain signal level Does not invert the signal. A=A Input = Output

Inverter

Common Emitter Amplifier Inverts the input signal 180 degrees. Also referred to as a NOT gate. Amplifies Isolate

CMOS

Complementary Metal Oxide Semiconductor -uses MOSFETs -Consumes less power -Less noise -Gates can operate at 3 - 15 volts -High input impedance. -74HCxx

CMOS

Complementary Metal Oxide Semiconductor The technology used to manufacture microchips. CMOS chips require less electricity; hold data longer after the electricity is turned off, are slower, and produce less heat than earlier technologies. The configuration, or setup, chip is a CMOS chip. Pairs of EMOSFETs

OR Gate

Digital circuit that implements the OR operation. The output of this circuit is HIGH (logic level 1) if any or all of its inputs are HIGH.

Programmable Logic Device

Digital integrated circuit that can be programmed by the user to implement any digital logic function. PLDs are either SPLDs (simple PLDs) or CPLDs (complex PLDs).

ECL

Fastest logic single ended op amp never goes into saturation high power consumption uses negative logic able to drive heavy loads Ueses BJT's has problems interfacing with TTL and CMOS --use level shifter.

Aliasing

Frequencies that overlap the signal low pass filters increase the sample rate.

Unused Gates

Inputs- AND and NAND - tie high. OR and NOR - tie ground Outputs- AND and OR - tie high. NAND and NOR - tie low

Field-Programmable Gate Array (FPGA)

Is generally more complex and has a much higher density than a CPLD. Has a different internal structure (architecture). Three basic elements in an FPGA are the logic block, the programmable interconnections, and the input/output (I/O) blocks. not as complex as the logic array blocks (LABs) in a CPLD, but generally there are many more of them.

Open collector Logic Output

Isolates outputs Good current source needs pull-up resistor for voltage sourcing.

Least reliable method of triggering

Level triggering

Threshold Voltages for IC

Low 0-0.8v High 2-5v

Decade Counter

MOD 10 counter, Decade counters count in units of 10s, 0 through 9 (0000 through 1001)

Flip-flop

Main Uses: -Storing and transferring data -Counters -Frequency Division Outputs are always comlements.

Main difference between a Johnson and Ring counter

Method used for changing their state

Main difference between a Latch and a Flipflop

Method used for triggering

Open-collector

Open-collector, (OC) or open-drain for CMOS, outputs are commonly used in buffer/inverter/driver IC's (TTL 74LS06, 74LS07) allowing for a greater output current and/or voltage capability than you would get with ordinary logic gates. outputs or open-drain (in the case of the CMOS logic) outputs need to connect to an external pull-up resistor between their output pin and the dc power supply to make the logic gate perform the intended logic function.

TTL to CMOS

Pullup resistor needed.

Down counters use Output

Q -- Q not of first flip-flop connected to the toggle of the next flip-flop

Up counters use output

Q connected to the toggle of the next.

what happens when you reset a flipflop

Q goes low, Q Not goes High

Simple Programmable Logic Device

SPLD was the original PLD and is still available for small-scale applications. Generally, an SPLD can replace up to ten fixed-function ICs and their interconnections, depending on the type of functions and the specific SPLD. Most SPLDs are in one of two categories: PAL and GAL.

IC integration level

Small Scale (SSI) less than 12 logic gates Medium Scale (MSI) 12 - 99 Logic gates Large Scale (LSI) 100-9,999 Logic Gates Very Large (VLSI) 10,000-99,999 Logic Gates Ultra Large (ULSI) 100,000 or more

TTL

Transistor-Transistor Logic -Most common logic in use -Uses Bipolar junction transistors +5v

Make the MOD less than the max

Use additional gates

ASCII Code

Uses 7 bits to represent all the alphanumeric characters. Control - commands and formatting Ordinary - alphanumeric characters and puncition marks

BiCMOS

Uses a combination of both CMOS and bipolar.

Bypass Capacitor on a logic DIP chip

Vcc to ground

Sign-Magnitude Form

When a signed binary number is represented in sign-magnitude, the left-most bit is the sign bit and the remaining bits are the magnitude bits. The magnitude bits are in true (uncomplemented) binary for both positive and negative numbers.

Master Slave Flip-flop

always uses pulse triggering

enhancement-mode MOSFET

common switching elements in most MOS. These devices are off at zero gate-source voltage, and can be turned on by pulling the gate voltage either higher than the source voltage, for NMOS, or lower than the source voltage, for PMOS. In most circuits, this means pulling an enhancement-mode MOSFET's gate voltage towards its drain voltage turns it ON.

comparator

compares two quantities and indicates whether or not they are equal. For example, suppose you have two numbers and wish to know if they are equal or not equal and, if not equal, which is greater.

State Indicators

determines the logic level that needs to activate a particular part of the circuit.

Totem pole logic output

one on, other off. Good voltage source

Floating inputs

unconnected from either a defined HIGH or LOW condition, it has the potential to "float" about between 0V and +5V (Vcc) allowing the input to self-bias at any voltage level whether that represents a HIGH or a LOW condition. Accidental switching of digital circuits

Inactive State

voltage is opposite the terminal indicator.

Active State

voltage is the same as the terminal indicator.

Difference between load and reset.

where the data comes from