Assembly final
For the GNU assembler, the ____ keyword is used to make an assembly function/procedure visible/accessible to foreign codes (C, C++, FORTRAN, etc).
.global
Assembly executable instructions are written in the ____ segment, while all memory/variable declarations are written in the ___ segment.
.text, .data
The Intel x86_64 architecture has ___ general purpose registers.
16
A 16G x 32 memory module will have ___ memory locations (L), will require ___ address bits, and each memory location will contain ___ -bit words (W).
2^26 (L), 26 address bits, 32 (W)
A 3x8 Decoder will have ___ inputs and ___ outputs.
3 Inputs, 8 outputs
An 32x1 multiplexer has __ inputs, and __ select bits.
32 inputs, and 5 select bits.
A system with a 8M x 32 main memory has a 64G x 2K virtual memory and will require ___ bit's for each virtual address, ___ bit's for each physical address, and ___ bits for the offset in both addresses.
36 bits, 23 bits, and 11 bits.
A system with a 2K x 32 main memory has a 64 x 16 cache, therefore each address contains ___-bits for specifying the cache block, ___ bits for specifying the tag, and 4 bid for specifying the offset.
6, 1
The .quad instruction reserves ___ bits of memory in the data segment.
64 bits. 8 bytes, 64 bits.
George Boole
Authored The Laws of Thought
Sequential Circuit
Built by using its current state to determine successive ones
Microcode
List of all RTL operations in a computer's instruction set.
Data and instruction _______ is the principle that allows a cache to increase CPU throughout.
Locality of deference.
Virtual Addresses
May refer to data currently not in RAM.
Victim Block
Might be copied to RAM before it is deleted from the cache.
Characteristic table
More compact representation of a truth table
When constructing a 3-bit adder, why might you use a Full-adder instead of a half-adder to add the two least-significant bits of the input?
More modular design (could use to make a 6-but adder or a subtractor).
Feedback
Occurs when output from a circuit is also input to that circuit
An XNOR gate takes 2 Boolean inputs and produces ____ Boolean output(s).
One
In an enabled decoder, ___ output(s) are active (have a value of 1) at any time.
One.
When translating an assembly instruction into binary machine code, the first step is looking up the _____ for that instruction in the instruction set reference.
Opcode
The instruction register in the RSC contains the ___ of the executing instruction
Opcode.
State the difference between a positive-edge triggered JK flip-flop, and a negative-edge triggered one.
Positive-edge triggered: changes state/updates when the clock changes from 0 to 1. Negative-edge triggered: changes state/updates when the clock changes from 1 to 0.
Instruction cycle
Process by which instructions are processed out of memory
gate
Produces a single Boolean output based on Boolean inputs
Claude Shannon
Proved that Boolean logic could apply to digital circuits
Product-of-Sums (POS)
Groups of OR'd variables fed through an AND gate
Describe the differences between high-order interleaving and low-order interleaving
High order: most significant bits determine the memory module, least significant bits determine location within the modules. Low-order: least significant bits determine the memory module, most significant bits determine the location within the modules (reverse order).
address
Identifies location of a piece of information in memory
John Atanasoff
Invented the first electronic digital computer
computer design
Involves the integration of various computer components
Computer Architecture
Involves understanding processor instruction sets
Random
A method for selecting victim blocks.
Boolean
A single binary value, either 0 or 1
Cache
A subset of main memory that can be quickly accessed.
Micro-operation
An RTL statement describing one part of an instruction set.
Pipelining
Can be achieved using low-order interleaving
Explain the differences between Combination Circuits and Sequential Circuits.
Combinational circuits - cannot hold memory, inputs -> outputs, feed forward. Sequential circuits - can hold memory, inputs + outputs -> next output, use clocks, feedback.
The RSC's ____ unit is composed of two hardwired D and T circuits.
Control.
control unit
Ensures that data is moved where & when it needs to be.
A simplified Boolean expression is usually implemented using more logic gates than an unsimplified Boolean expression. T or F ?
False
The ___ register in the RSC is a general purpose register.
R
counter
Sequential circuit that cycles through a set of numeric states
Flip-flop
Simplest example of a sequential circuit
Logic Diagram
Specifies wiring details for components in a digital circuit
Computer Organization
Study of the internal details of computer components
Register Transfer Language
Symbolic way to express what happens during instruction execution.
clock
Synchronizes state changes in a sequential circuit
An OS system call can be initiated by using ______ instruction
Syscall
The fact that data accessed in the recent past is more likely to be accessed again in the recent future than other data is an example of _____ locality.
Temporal locality.
Synchronous buses do not require "handshaking" to coordinate data transfers. T or F?
True
The Intel x86_64 architecture is backward compatible with both the Intel 32-bit (IA32) and Intel 16-bit (8086) architectures. True or false?
True
Both J-K and D Flip-flops can be used to construct sequential circuits. T or F?
True.
Bus
Used to transfer data to/from different components. Set of wires, that acts as a shared data path between subsystems.
Combinational Logic
Uses logic gates to implement mathematical functions