C952: Computer Architecture Chapter 3
Decimal value of the following 16-bit two's complement number: 1111111111111000two −4ten −8ten −16ten 65,528ten
-8ten: The leading 1 indicates the value is negative. To determine the magnitude each bit is complemented, and then 1two is added. 0000000000000111two +1two=0000000000001000two The binary result is converted decimal: 0000000000001000two=8ten
Data transfer instruction
A command that moves data between memory and registers.
What is the value of X19 after: MOV X19, XZR?
0 The XZR register has the value of 0. This instruction copies the value of 0 from XZR to X19. This instruction carries out the initialization part of a for loop, setting i = 0.
What 12-bit value is stored in the immediate field?
0000 0000 0101: 5ten is the constant value. The 12-bit binary value of 5 is 0000 0000 0101.ADDI X3, X4, 5translated to LEGv8 machine language code:
Field 3
000000 // 6 bits
Consider the 64-bit binary number 11100000 00000000 00000000 00000000 00000000 00000000 00000000 00000001, stored in the doubleword with address 5000. For a big-endian architecture, what value is stored in byte 5007?
00000001: In a big-endian architecture, the highest byte is put into the leftmost byte of a word (5000), so the lowest byte is put into the rightmost byte (5007).
What 5-bit value is stored in Rn field?
00100: The Rn field stores the first source register, X4. X4 is register number 4. The 5-bit binary value of 4 is 00100.
What is 2f in 8-bit binary?
00101111: 2 is 0010.f is 1111.Together the bits are 2f.Hexademical allows representing bits using fewer digits than binary.
What is 3ten as a 4-bit base two number?
0011
What 5-bit value is stored in Rd field?
00111: The Rd field specifies the destination register. X7 is register number 7. The 5-bit binary value of 7 is 00111.
Field 5
01001 // 5 bits
Given: ADD X5, X9, X1What 5-bit value is stored in field 4?
01001: Field 4 stores the the number of the first source register, X9. The 5-bit binary value of 9 is 01001.
How much is X19 increased by: ADDI X19, X19, #1?
1 The number in the instruction, 1, is the amount by which the register X19 is increased. This instruction carries out the iteration increment part of a for loop, computing i += 1.
Immediate Vaule
1 in row 3 In the third instruction, bits 20:9 represent a constant (in this case, 1) in the immediate field.
Field 2:
10101 // 5 bits
How many bits are used to indicate that an instruction performs ADD?
11: field 1 indicates ADD which is 11 bits wide.
What is the largest base ten number representable in 4 bits (assuming the "natural" representation)?
15: 1111two is 15ten. The number can also be computed as 24 - 1.
An array A has a base address of 2000. What is the address of A[9]?
2072: Each doubleword has 8 bytes, each with an address. So the array's elements are at 2000, 2008, 2016, etc. Thus, A[9] is at 2000 + 9 × 8 = 2072.
X21
21 in row 2: In the second instruction, 21 appears in the Rn field. For an ADD instruction, a 21 in that field represents the X21 register.
Total number of ARMv8 integer machine language instructions.
250: Total number of ARMv8 integer machine language instructions.
What's the error? ADD [X9], [X19], [44]
44: 44 is not a valid register operand; the ADD instruction expects three register operands.
ADDI's opcode is _____.
580: Seeing 580 in the first 10 bits, the hardware recognizes the instruction as add immediate, and interprets the remaining fields as an I-type instruction, including an immediate (constant, 12 bits), source register (5 bits), a destination register (5 bits).
An ADD instruction has fields for three registers. How many bits are used for any one of those registers?
5: Fields 2, 4, and 5 are each 5 bits wide. Note that 5 bits can represent 25 items, corresponding to the 32 available registers.
Of a doubleword's 64 bits, what is the leftmost bit numbered?
63: The numbering of the rightmost bit starts with 0, so the leftmost bit is numbered with 63 rather than 64.
In the LEGv8 architecture, each register is _____ bits wide.
64
Microsoft Windows: Pointers, Integers, Long Int, Long long Int
64, 32, 32, 64 bits
Linus, Most Unix: Pointers, Integers, Long Int, Long long Int
64, 32, 64, 64 bits
If X1 holds 2000, what is X2 (in decimal) after: LDURB X2, [X1, #0] 2000 65 Low byte is 65; rest unknown.
65: LDURB loads the one byte at address 2000, which has a value of 65, into X2.
Number of branch instructions in LEGv8
6: LEGv8 has fewer instructions than the full ARMv8 ISA.
Each doubleword consists of _____ bytes.
8: Each LEGv8 word has 64 bits, meaning 8 bytes (a byte is 8 bits).
Branch on Minus
(B.MI): N=1
Branch on plus
(B.PL): N=0
Branch on overflow clear
(B.VC): V=0
Branch on overflow set
(B.VS): N=1
Protected
A Java keyword that restricts invocation of a method to other methods in that package.
Pseudoinstruction
A common variation of assembly language instructions often treated as if it were an instruction in its own right.
Executable File
A functional program in the format of an object file that contains no unresolved references. It can contain symbol tables and debugging information. A "stripped executable" does not contain that information. Relocation information may be included for the loader.
Return address
A link to the calling site that allows a procedure to return to the proper address; in LEGv8 it is stored in register LR (X30).
OR
A logical bit-by-bit operation with two operands that calculates a 1 if there is a 1 in either operand.
EOR
A logical bit-by-bit operation with two operands that calculates the exclusive OR of the two operands. That is, it calculates a 1 only if the values are different in the two operands.
Static method
A method that applies to the whole class rather to an individual object. It is unrelated to static in C.
General-purpose register(GPR)
A register that can be used for addresses or for data with virtually any instruction.
procedure
A stored subroutine that performs a specific task based on the parameters with which it is provided.
Assembly Language
A symbolic language that can be translated into binary machine language.
Address
A value used to delineate the location of a specific data element within a memory array.
Push
Add element to stack.
Doubleword
Another natural unit of access in a computer, usually a group of 64 bits; corresponds to the size of a register in the LEGv8 architecture.
cmp
Arithmetic: CMP is a pseudoinstruction that compares two registers.
What is the range of addresses for branch and branch and link in LEGv8 (M = 1024K)? Addresses between 0 and 64M - 1 Addresses up to about 128M before the branch to about 128M after
B The unconditional branch is PC-relative, which means it can branch ± 128 MB from the current PC.
Assume the values in X19 and X20 are signed binary numbers, and X20 is positive. Complete the following code to jump to L2 if the bounds check 0 ≤ X19 < X20 fails. SUBS XZR, X19, X20 _____ L2 B.HS B.GE
B.HS: B.HS provides a low cost way of checking if X19 < X20 or if X19 is negative.
Package
Basically a directory that contains a group of related classes.
Machine language
Binary representation used for communication within a computer system.
C
C allows a user to write higher-level expressions using a single line.
if_icompne, Exit
Compare and exit if not equal
Equal
EQ // Signed Z=1 // Unsigned Z=1
What is 11110000 in 2-digit hexadecimal? Write answer as: a1
F0: 1111 is f. 0000 is 0. Together 11110000 is f0.Hexademical allows representing bits using fewer digits than binary.
P is a leaf procedure.
False: A leaf does not call other procedures. A non-leaf calls other procedures.
A procedure's local variables are normally stored on the heap.
False: Local variables are normally stored in registers or on the stack.
Greater than or equal
GE// signed N=V// Unsigned C=1
Greater than
GT// signed (Z=0 & N=V) // Unsigned (Z=0 & C=1)
jnz, jz
Jump if condition to EIP + 8-bit offset
Less than or equal
LE// signed ~(Z=0 & N=V)// Unsigned ~(Z=0 & C=1)
A compiler replaces x = 2 * 3 with x = 6.
Local optimization: Such "constant folding" reduces the calculations needed during runtime. Local optimizations are "local" to a basic block.
BRANCH 2500
Not Valid LEGv8
LDUR X1, [X35, 20]
Not Valid LEGv8
call
Subroutine call-16-bit offset; return address pushed onto stack
load
The data transfer instruction that copies data from memory to a register is traditionally
Opcode
The field that denotes the operation and format of an instruction.
Most significant bit
The leftmost bit in an LEGv8 doubleword
Global pointer
The register that is reserved to point to the static area.
In C, a possible way to declare an integer array is: int *array.
True: int *array declares a pointer to an integer, which can represent an array of integers. The first element of the array is accessed by entering &array[0].
Data race
Two memory accesses form a data race if they are from different threads to same location, at least one is a write, and they occur one after another.
ARMv8 assembly language registers used for 32-bit operations.
W0, W1,...: Programmers use W registers to specify 32-bit operations and X registers (X0, X1, ...) to specify 64-bit operations.
Suppose X1 holds 3000, and X2 holds 97 (in decimal). Suppose writing to address 3000 prints a character to the screen. What is printed after the following instruction? STURB X2, [X1,#0] 97 a 3000
a 97 is the character 'a' in ASCII. Writing 97 thus prints 'a' to the screen (assuming special functionality associated with memory address 3000).
add, sub
addition from source and subtraction from source
cmp
compare source and destination; register-memory format
How many bits are used to hold a condition code?
four: Four extra bits hold a condition code, which record what happened during an instruction's execution.
inc, dec
increment destination, decrement destination
Offset
is a constant value added to a base address to locate a particular array element (8 below).
base address
is the starting address of an array in memory (5000 below)
les
load ES and one of the GPR's from memory
lods
loads a byte, word, or double word of a string into the EAX register
ret
pop returns address from stack and jumps to it
LDR X10, [X11, #16]!
pre-indexed addressing mode: This method will store the X11's address + 16 into X10 and will change X11's address to be X11's address + 16.
push, pop
push source operand on stack: pop operand from stack top a register
Return from subroutine instruction
ret: LEGv8 does not include RET.
X19-X28
saved registers that must be preserved on a procedure call (if used, the callee saves and restores them)
X9-X17
temporary registers that are not preserved by the callee (called procedure) on a procedure call
negative (N)
the result that set the condition code had a 1 in the most significant bit;
The first microprocessors were precursors to the _________ architecture. x86 ARM
x86: Intel's x86 architecture was built as backwards compatible, meaning the x86 was designed to be compatible with previous Intel microprocessors.
Given the following 64-bit number, what is the most significant bit's value?1000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
1: The leftmost bit is the most significant bit, meaning the bit with the greatest weight. Using the term "most significant bit" versus "leftmost bit" helps prevent confusion if a word is drawn vertically.
What 10-bit value is stored in the opcode field?
1001000100: The ADDI instruction is specified with a 580tenin the opcode field. The 10-bit binary value of 580 is 1001000100.
Field 4
10100 // 5 bits
ADDI X9, [X20], [99] Result: X9 gets [104].
104: 104 would be X19's 5 plus 99, but the operand is X20. Thus, X20's 20 plus 99 is 119.
What is −9ten in an 8-bit two's complement representation?
11110111: +9 is 00001001.After inverting: 11110110After adding 1: 11110111Thus, 11110111two is −9ten.
If +3ten is 00000011two, what is −3ten in an 8-bit two's complement representation?
11111101: After inverting: 11111100After adding 1: 11111101Thus 11111101two is −3ten.
Given -5 in 8-bit two's complement: 11111011.Extending to 16 bits yields: _____
11111111 11111011: The sign bit in 11111111 is 1. Thus, sign extension places 1's in all bits to the left.
Number of machine data transfer instructions for integers
125: ARMv8 has 125 machine data transfer instructions and 49 assembly data transfer instructions for integers.
What is 1110 two in base ten?
14
Opcode for a load register instruction.
1968 in one row: The first field of an instruction is the opcode. 1986 is the opcode for load register. Thus, the first instruction is load register.
Opcode _____ indicates a store register instruction.
1984: Seeing 1984 in the first 11 bits, the hardware recognizes the instruction as store register, and interprets the remaining fields as a D-type instruction, including an offset (address, 16 bits), op2 (2 bits), base register (5 bits), and a source register (5 bits).
Given: ADD X5, X9, X1What decimal value is stored in field 2?
1: Field 2 stores the number of the second source register, X1. Thus field 2 stores 1.
An array A has a base address of 2000. A[0] is thus at address 2000. What is the address of A[1]?
2008: Each byte has an address. So A[0]'s first byte is at 2000, second at 2001, third at 2002, fourth at 2003, fifth at 2004, sixth at 2005, seventh at 2006, and eighth at 2007. Thus, A[1] starts at 2008.
What's the error? [ADD] X9, X19, [X20] Result: X9 gets [20]
20: The instruction adds the values in X19 and X20, meaning 5 + 20, yielding 25 rather than 20.
Number of branch instructions in ARMv8
23: LEGv8 only has 6 branch instructions compared to ARMv8's 23. ARMv8 also includes types of instructions that do not exist in LEGv8 (conditional select and conditional compare).
An offset
240 in row 1: The first instruction is a load register instruction. Thus, bits 20:12 represent an offset (in this case, 240), that will be added to a base register's value to form an address. The same is true for the fourth instruction.
How many total bits is a machine instruction
32: 11 + 5 + 6 + 5 + 5 = 32
Sign and magnitude representation
is a signed number representation where a single bit is used to represent the sign, and the remaining bits represent the magnitude.
test
logical AND of source and destination sets condition codes
To isolate bits 7..4 in the rightmost 4 bits of a 64-bit doubleword, one can first shift left 56 bits, then right _____ bits.
60: Shifting left 56 bits moves bits 7...4 to the leftmost bits. Shifting right 56 bits would move those bits back to locations 7...4 with 0's to the left, but with the original bits 3...0 to the right. Shifting right 4 more places, so 60 total, is needed to move the original bits 7...4 to locations 3...0.
If X1 holds 2000, what is X2 (in decimal) after: LDUR X2, [X1, #0] 65 65 + 66 + 67 + 68 + 69 + 70 + 71 + 72 A very large number.
A very large number LDUR loads a doubleword, meaning 8 bytes starting at 2000. The eight bytes are appended. In decimal, those bytes are 72 71 70 69 68 67 66 65. In binary, each byte would have some 1's and 0's, including the high-order byte, meaning a large number.
A DLL approach results in faster-running programs.
False: Linking the DLL takes extra time. Thus, speed is (slightly) reduced, in exchange for smaller object files and easier updates of libraries.
Is a Memory[0] a LEGv8?
False: Memory[0] refers to a memory location, not a register. A register is a fast location for data, but only relatively few registers exist in LEGv8. In contrast, over 4 quintillion memory locations exist in MIPS.
Is XONE a LEGv8?
False: No such register exists; with only 32 registers available, not all convenient registers can be included.
Both ARMv7 and ARMv8 have instructions to move several registers to and from memory.
False: Only ARMv7 has Load Multiple and Store Multiple instructions.
PC-relative addressing likely has no influence on the performance of the ARMv8 architecture.
False: PC-relative addressing, an addressing mode often used for conditional branching, provides addresses to instructions close to the current branch address. This mode tends to improve the performance of conditional branching and is a good example of making the common case fast.
Sequential doubleword addresses differ by 1 byte.
False: Sequential doubleword addresses are 8 bytes apart, therefore a variable index needs to be multiplied by 8 before adding the variable index to the address.
Goal: Force the rightmost bit of X10 to be 1._____ X10, X10, 1
ORI: Ex: 1010...1010 OR 0000...0001 yields 1010...1011.
If P will write to X0 to pass a parameter to Q, P might first need to save X0 to the stack.
True: If X0 is used later in P, then P should save X0 to the stack before overwriting X0 and calling Q, and should then restore X0 after the call to Q.
A DLL approach better supports library updates.
True: In a static approach, the library is part of the object program. A later update to a library can't be included, unless the object program is re-compiled.
An executable file is executed after a loader places the file into main memory.
True: In operating systems, a loader follows a series of steps to move the executable file program to main memory and to prepare the program for execution.
The instruction sets of different computers are quite similar to one another.
True: Instruction sets are similar because computers are constructed from hardware technologies based on similar underlying principles, and because all computers must provide several basic operations.
By convention, LEGv8 uses 8 registers for parameter passing allocation.
True: LEGv8 convention is to use registers X0 to X7 to store parameters passed to a function.
If a program allocated huge arrays, the program may cause the heap to run into the stack, causing an error.
True: No program can allocate infinite memory; the size of the heap is limited.
Procedure P needs 2 local variables. P will almost certainly need to put those local variables on the stack.
True: P likely can use registers X9 - X17 (though using X16 - X18 is discouraged as those registers can be used other purposes) for those two variables. The stack is only needed if many variables exist.
Branch register instruction
br: BR is included in both LEGv8 and ARM. Though the BR and RET instructions appear similar, a return from a subroutine (RET) is easier to predict than a branch from branch table.
What does B.LT stand for?
branch on less than: Branch on less than is one of six conditions used for signed comparison instructions. Condition codes also exist for unsigned comparison instructions.
shl, shr, rcr
shift left, shift right, rotate right with carry condition code as fill
Total number of ARMv8 SIMD/Vector assembly language instructions.
245: ARMv8 has 245 SIMD/Vector assembly language instructions and also has 537 SIMD/Vector machine language instructions.
What is the largest base ten number representable in 8 bits (assuming the "natural" representation)?
255: 28 - 1 is 255. That largest number in base two is 11111111two.
How is the largest base ten number representable by 64 bits calculated (assuming the "natural" representation)?
2^64-1: 264 - 1 is approximately 18.5 quintillion.
The 1985 Intel 80386 extended the previous architecture to ____ bits
32: The 80386 extended the 80286 and included a 32-bit architecture with 32-bit registers and a 32-bit address space.
What is 0011 as a hexadecimal digit?
3: Hexadecimal has symbols 0 - 9, so 0011 is just 3. Beyond 9, hexadecimal uses letters a - f.
Goal: multiply X10 by 8.LSL X10, X10, _____
3: In base two, shifting left by 3 places is like multiplying by 23 (or 8), just like in base ten where shifting left by 3 places is like multiplying by 103 (Ex: 55 × 1000 = 55000). Shifting is preferred when possible due to being a more efficient operation than multiplication.
What is the largest base ten number approximately representable by 32 bits (assuming the "natural" representation)?
4 billion 232 - 1 is 4,294,967,295, or just over 4 billion.
Stack
A data structure for spilling registers organized as a last-in- first-out queue.
Instruction format
A form of representation of an instruction composed of fields of binary numbers.
AND
A logical bit- by-bit operation with two operands that calculates a 1 only if there is a 1 in both operands.
NOT
A logical bit-by-bit operation with one operand that inverts the bits; that is, it replaces every 1 with a 0, and every 0 with a 1.
Word
A natural unit of access in a computer, usually a group of 32 bits.
Biased notation:
A notation that represents the most negative value by 00 ... 000two and the most positive value by 11 ... 11two, with 0 typically having the value 10 ... 00two, thereby biasing the number such that the number plus the bias has a non-negative representation.
One's complement
A notation that represents the most negative value by 10 ... 000two and the most positive value by 01 ... 11two, leaving an equal number of negatives and positives but ending up with two zeros, one positive (00 ... 00two) and one negative (11 ... 11two). The term is also used to mean the inversion of every bit in a pattern: 0 to 1 and 1 to 0.
Calle
A procedure that executes a series of stored instructions based on parameters provided by the caller and then returns control to the caller.
Alignment restriction
A requirement that data be aligned in memory on natural boundaries
Basic block
A sequence of instructions without branches (except possibly at the end) and without branch targets or branch labels (except possibly at the beginning).
Two's complement
A signed number representation where a leading 0 indicates a positive number and a leading 1 indicates a negative number. The complement of a value is obtained by complementing each bit (0 → 1 or 1 → 0), and then adding one to the result
Loader
A systems program that places an object program in main memory so that it is ready to execute.
Symbol table
A table that matches names of labels to the addresses of the memory words that instructions occupy.
Loop-unrolling
A technique to get more performance from loops that access arrays, in which multiple copies of the loop body are made and instructions from different iterations are scheduled together.
Frame Pointer
A value denoting the location of the saved registers and local variables for a given procedure.
Stack pointer
A value denoting the most recently allocated address in a stack that shows where registers should be spilled or where old register values can be found. In LEGv8, it is register SP
Accumulator
Archaic term for register. On-line use of it as a synonym for "register" is a fairly reliable indication that the user has been around quite a while.
What is 1011 as a hexadecimal digit?
B: Hexadecimal uses symbols a - f for binary values 1010 - 1111 (decimal values 10 - 15). a is 1010, b is 1011, etc.
Just in time compiler
The name commonly given to a compiler that operates at runtime, translating the interpreted code segments into the native code of the computer
Immediate addressing
The operand is a constant within the instruction itself Ex: In ADDI X1, X9, 4, the immediate value 4 is in bits 9 to 21 of the instruction's 64-bit machine code: 1001000100 000000000100 01001 00001.
Register addressing
The operand is a register Ex: ADDI X1, X9, 4 has machine code 1001000100 000000000100 01001 00001. The first bits 1001000100 are the opcode. The next bits after the immediate field, 01001 address register X9, and the next bits 00001 address X1.
Base addressing/ displacement addressing
The operand is at the memory location whose address is the sum of a register and a constant in the instruction Ex: In LDUR X0, [X3, #32], the memory location to be loaded into X0 is found by adding register X3 and constant 32.
Caller
The program that instigates a procedure and provides the necessary parameter values
Java Virtual machine (JVM)
The program that interprets java bytecodes
Program counter (PC)
The register containing the address of the instruction in the program being executed.
Least significant bit
The rightmost bit in an LEGv8 doubleword
Text Segment
The segment of a UNIX object file that contains the machine language code for routines in the source file.
Instruction set
The vocabulary of commands understood by a given architecture.
carry (C)
the result that set the condition code had a carry out of the most significant bit or a borrow into the most significant bit.
overflow (V)
the result that set the condition code overflowed;
zero (Z)
the result that set the condition code was 0;
y = x + 1; is converted to y, =, x, +, 1, and ;. Scanning Parsing Semantic analysis
scanning: Scanning reads characters into a string of tokens. Here, the tokens are y, =, etc.
For the abstract syntax tree of y = x + 1;, x is determined to be a non-numeric type for which adding 1 doesn't make sense, so an error is reported. Parsing Semantic analysis IR generation
semantic analysis: Semantic analysis checks the "meaning" of a program. x + 1 is syntactically correct, but has no meaning if x is not some kind of number (e.g., if x is a string like "Hello").
Which type of variable that can contain 1,000,000,000ten takes the most memory space? int in C string in C string in Java
string in Java: Characters in Java are encoded using 16-bits. 1,000,000,000ten represented as a string in Java requires 160-bits (10 characters × 16 bits/character).
Field 1:
10001011000 // 11 bits
If X1 holds 2000 and is increased by 1, what is X2 (in decimal) after: LDURB X2, [X1, #0] 65 66 67
66: 2000 + 1 is 2001. Address 2001 has value 66.
Hexadecimal
Numbers in base 16.
Public
A Java keyword that allows a method to be invoked by any other method.
Is X a LEGv8 register?
False: The X must be followed by a number 0-30, or ZR.
sign extension
The function of a signed load is to copy the sign repeatedly to fill the rest of the register
spilling registers
The process of putting less frequently used variables (or those needed later) into memory
jmp
Unconditional jump
or, xor
logical or, exclusive or
comments
the words to the right of the double slashes (//) on each line are comments for the human reader, so the computer ignores them
In contrast to C, Java calls the appropriate method (procedure) based on the ____ of the calling object. size type
type: In C, printing a variable p of type struct Person might use a call like PersonPrint(p). In Java, the call might be p.Print(). The compiler calls the correct Print() method based on the type of p. Other Print() methods may exist too, such as for a Dog, Car, etc.
In contrast to C, Java explicitly stores an extra item in every array indicating the array's ____. lower bound upper bound
upper bound: In contrast to C, Java explicitly stores an extra item in every array indicating the array's ____.
Assuming a 64-bit two's-complement representation, what is 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111100two in base ten?
-4: After inverting: 00000000 ... 00000011After adding 1: 00000000 ... 00000100In base ten: -4
Knowing that 263 is 9,223,372,036,854,775,808, what is the base ten value of the following two's complement number?10000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
-9,223,372,036,854,775,808: The leftmost bit is multiplied by -263, then added with the remaining bits that are multiplied by those bits' usual positive base values. Because those remaining bits are all 0's, the base ten value is just -9,223,372,036,854,775,808 + 0 = -9,223,372,036,854,775,808.
X10, containing a base address.
10 in row 1: The first instruction is a load register instruction. Thus, the 10 in the Rn field represents a base register, in this case X10. The 10 will be added with an offset to form the address of the memory doubleword to load. The fourth instruction is similar, except the formed address is where data will be stored.
Why does C provide two sets of operators for AND (& and &&) and two sets of operators for OR (| and ||), while LEGv8 doesn't? -Logical operations AND and ORR implement & and |, while conditional branches implement && and ||. -The above choice has it backward: && and || correspond to logical operations, while & and | map to conditional branches. -They are redundant and mean the same thing: && and || are simply inherited from the programming language B, the predecessor of C.
A: & and | do bit-by-bit operations, like MIPS' logical operations. && and || compare entire values (vs. bit-by-bit) like branch instructions. Thus, complex C expressions using && and || may be compiled into numerous branch instructions.
A main program will call a procedure Power for computing xy. Currently, x is in X19, y is in X20. How might the program pass the parameter values to Power? -ADD X0, X19, XZRADD X1, X20, XZR -ADD X19, X0, XZRADD X20, X1, XZR -ADD X9, X19, XZRADD X10, X20, XZR
A: The first instr sets X0 with X19's value. Likewise for the second instr. X0-X7 are intended for passing values to a procedure.
If the memory values represent a string of characters in ASCII, what are those letters? -abcdefgh -ABCDEFGH -6566676869707172
ABCDEFGH: 65 is A, 66 is B, 67 is C, 68 is D, 69 is E, 70 is F, 71 is G, and 72 is H. In contrast to a number, which uses four bytes, a string of characters can be stored using one byte per character, to save memory.
Type a LEGv8 add instruction that computes:a = a + b
ADD a,a,b
Type a LEGv8 add instruction that computes:z = x + y
ADD z,x,y
What's the error? [ADD] X9, [X19], 23 Result: X9 gets [28]
ADD: ADDI, not ADD, must be used if the third operand is an immediate value like 23 rather than a register like X20.
In 2003, a company called _____ released a 64-bit version of the x86 instruction set.
AMD: AMD is a company, other than Intel, that has enhanced the x86 architecture. The AMD64 extended x86 address space from 32 bits to 64 bits and widened all registers to 64 bits.
Mask
AND can apply a bit pattern to a set of bits to force 0s where there is a 0 in the bit pattern. Such a bit pattern in conjunction with AND is traditionally
An _________ processor powered the Apple Newton personal digital assistant. x86 ARM
ARM: Though the Apple Newton was a commercial failure, ARM processors became popular, currently powering millions of cell phones.
Single register architecture
Accumulator architecture: The earliest computers had only one register to perform arithmetic operations. All operations would accumulate in the single register, called the accumulator.
_________ was invented as a way to express algorithms more naturally than its predecessors, with less focus on coding.
Algol: Algol introduced the concepts of to programming languages including recursion, nested if-then-else statements, while loops, and begin-end statements for code blocks. Short for ALGOrithmic Language.
How is 0 represented in two's complement? All 0's: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000orAll 1's: 11111111 11111111 11111111 11111111 11111111 11111111 11111111 11111111
All 0's: 0 × -2^64 + 0 × 2^63 + 0 × 2^62 ... = 0.All 1's actually represents -1: The first 1 is multiplied by -263, and the remaining 63 1's summed yields 263 - 1, so the sum is -1.
Procedure frame
Also called activation record. The segment of the stack containing a procedure's saved registers and local variables.
Binary digit
Also called binary bit. One of the two numbers in base 2, 0 or 1, that are the components of information. d*Base^i
Branch address table:
Also called branch table. A table of addresses of alternative instruction sequences.
Linker
Also called link editor. A systems program that combines independently assembled machine language programs and resolves all undefined labels into an executable file.
Load-store architecture
Also called register-register architecture. An instruction set architecture in which all operations are between registers and data memory may only be accessed via loads or stores.
PC-relative addressing
An addressing regime in which the address is the sum of the program counter (PC) and a constant in the instruction.
Branch-and-link instruction
An instruction that branches to an address and simultaneously saves the address of the following instruction in a register (LR or X30 in LEGv8).
Conditional branch
An instruction that tests a value and that allows for a subsequent transfer of control to a new address in the program based on the outcome of the test.
A procedure Power computes X0 to the power of X1. How should the procedure branch back to the next instruction in the caller? -BR Caller -BR LR -BL LR
BR LR When a BL instruction called the procedure, BL stored the return address in LR. BR branches to the address in LR, thus branching to the next instruction after the BL instruction.
What is the range of addresses for conditional branches in LEGv8 (K = 1024)? -Addresses between 0 and 512K - 1 -Addresses up to about 256K before the branch to about 256K after -Addresses up to about 1024K before the branch to about 1024K after
C Conditional branches can branch ± 218 words from the current instruction, or 218 × 4 bytes.
In the 1970s, Bell Labs built the UNIX operating system using the _________ language.
C: C became a popular language because of the popularity of UNIX. Influenced by object-oriented languages like Simula-67, an object-oriented version of C, called C++, was later built.
Global and local optimizations.
Global optimizer: Makes changes to instructions that may yield less code or better performance, such as not computing an expression like (9/5)C + 32 twice, but instead reusing the result.
_________, developed for use in business settings, employs English vocabulary and punctuation.
Cobol: Cobol was developed to be a language for industry professionals. Previous languages were primarily used by engineers, computer scientists, and researchers. Short for COmmon Business-Oriented Language.
Converts the optimized intermediate representation into a processor's machine instructions.
Code generator: The last compiler phase outputs the actual processor-specific program. Much of the compiler's optimizations are independent of any particular processor, meaning most of the sophisticated software of a compiler can be used for any processor.
A first part of a main program calls procedure Power to compute xy, where x is in X19, y is in X20. Later, the program is to call Power again, but this time x is in X21 and y is in X26. How might the program pass the parameter values to Power? -Copy X21 to X0, and X26 to X1. -Not possible; x and y must be in X19 and X20.
Copy X21 to X0, and X26 to X1. Power will operate from the X0 and X1 registers, so the x and y values just need to be copied from current locations.
What type of instruction is STUR (store register)?
D-type: STUR uses a constant to indicate the offset from a base address. A D-type instruction has a 9 bit immediate field while I-type has a larger 12 bit immediate field. The LDUR instruction is similar.
10 go to 0
Go to top of Loop (byte address 0)
Higher
HI
ARMv8 and MIPS both have 64-bit instructions.
False ARMv8 and MIPS both have 32-bit instructions.
If a procedure will update registers X19, X20, X21, and X22, the procedure should make room on the stack by adding 32 to SP.
False: 32 is correct, but the procedure should subtract 32. For historical reasons, the stack grows downwards in memory, from higher to lower addresses.
A linker combines independently assembled machine language programs and then recompiles the programs.
False: A linker does not recompile the programs. Instead, a linker combines the pre-compiled programs and resolves undefined labels into an executable file.
MIPS uses condition codes for conditional branching.
False: ARMv8 and many other architectures use condition codes while MIPS uses comparison instructions and branches based on the results of the comparisons.
ARMv8 is more similar to ARMv7 than to MIPS.
False: ARMv8 is much closer to MIPS than to ARMv7 due to complete overhaul of the ISA.
Sign and magnitude representation and two's complement representation are used about equally in modern computers.
False: All computers use two's complement. Sign and magnitude representation was tried in early computers, but was difficult to implement efficiently in hardware, and the existence of both a positive and negative zero was problematic for programmers.
An assembly language program is a series of 0s and 1s that a machine understands.
False: An assembly language program is a symbolic language that is readable by humans, while being straightforwardly translatable into binary machine language (0s and 1s).
Higher or Same
HS
Stored-program concept
The idea that instructions and data of many types can be stored in memory as numbers and thus be easy to change, leading to the stored-program computer.
An x86 arithmetic and logical instruction can have one operand act as both a source and destination operand, but more than one operand is allowed.
False: An x86 arithmetic and logical instruction must have one source/destination operand. In contrast, MIPS and ARMv7 allow separate registers for source and destination operands.
If a running program should create a new array, the array is normally stored on the heap.
False: Arrays are of fixed length and thus are stored on the stack. Dynamically allocated data structures, which can grow and shrink in size, such as linked lists, are typically stored on the heap.
Writing code in a high-level language, such as C, results in more lines of code than writing in assembly language. Therefore, C programs take longer to write and debug.
False: Assembly language programs, not C programs, require more lines of code to perform high-level language operations. More lines of code tend to result in longer write and debug times.
The BL instruction copies registers to the stack.
False: BL stores the return address in register LR, and then branches to the target address. The procedure's instructions must first copy registers to the stack.
A DLL approach results in a larger object program
False: Because large libraries aren't loaded into the object program initially, the object program is smaller. A smaller program is easier to send, install, etc.
High-level optimizations are done on instructions that are close to the assembly level.
False: High-level optimizations are done close to the source level, not assembly level. The source level (like C, C++, or Java) has constructs like procedures and loops, and thus such optimizations focuses on those constructs.
Whether a procedure puts a local variable in a register or on the stack doesn't impact performance.
False: If a variable is on the stack, an extra instruction is needed to move the value into a register before performing computations with that value. Hence, putting variables directly into registers is preferred, but registers are limited in number.
Because I-type and D-type instructions involve a constant or address, I-type and D-type instruction use more bits.
False: Instructions are all 32 bits wide, to keep the hardware simple and fast. I-type and D-type instructions just use the bits differently than does an R-type.
Operations on strings, like length, are faster in C than in Java.
False: Java reserves the first position of the string to denote string length, so string operations such as determining length are trivial and can be faster in Java than in C. Similarly, strings are a standard Java class with special built-in support to enable efficient operations.
Compilers do not need to perform register allocation in RISC architectures.
False: Stack architectures, unlike RISC architectures, do not use registers and therefore remove the need for register allocation. Some early compilers, which did not allocate registers well, used stack architectures. The register allocation problem was solved using graph coloring.
Strings in C and Java use null (0) to mark the end of a string.
False: Strings in C use null (0) to mark the end of a string, while strings in Java reserve the first position of the string to specify the string length.
An object file is output by a compiler, and is a combination of machine language instructions, data, and information needed to place the instructions properly in memory.
False: The assembler, not the compiler, outputs the object file.
The base plus scaled index is an addressing mode found in MIPS, ARM, and x86 that can turn an array index in a register, or index register, into a byte address by multiplying the index by 8.
False: The base plus scaled index addressing mode is only found in x86 architecture and allows x86 to avoid multiplying an index register by 4 to produce a byte address. The mode instead scales the index register (by a power of 2) to allow for the size of the element at the index. In MIPS and ARM, an index register is multiplied by 8 to produce a byte address.
ARMv8 and MIPS have the same number of instructions.
False: The full ARMv8 instruction set has more instructions than the full MIPS instruction set.
If int* array is allocated to register X0 and int* p is allocated to register X9, the proper way to get p to point to array[0] is: MOV X0, X9.
False: The instruction is backwards, pointing array[0] to p. The correct instruction is MOV X9, X0.
An instruction set is a particular program provided in the language of a computer.
False: The instruction set is the language itself, not a particular program. The language is like English, whereas a program is like a particular book written in English.
In a lazy procedure linkage approach to DLL's, each routine is only loaded if a call to the routine exists in the object program.
False: The lazy approach is even smarter; the routine is only loaded when the procedure is actually called by the program. Thus, if a program has a call in the program but never executes that call, the routine is never loaded, thus reducing loading time.
If int *p is allocated to register X9 and &array[size-1] is allocated to register X11, then the proper loop test involves CMP X9, X11.
False: The loop test should compare if (p < &array[size]). Instead, comparing with &array[size-1] will exit the loop before the last element. X11 needs to be allocated to &array[size] for the statement to be correct.
A procedure should copy all of registers X9-X17 and X19-X28 to the stack, before executing the procedure's computations.
False: The procedure need only copy registers that the procedure modifies.
The stack is a region in the set of registers.
False: The stack is a region in memory. Register SP points to the top of the stack in memory.
A compiler and assembler using dynamically linked libraries (DLL) create a complete object program that can be loaded and run.
False: The traditional approach does so, but the DLL approach yields a partial object program. Then, when the program is to be run, additional library routines are linked and loaded.
Assuming the addresses are in registers, if the size of a word is 4 bytes, the address of the next word can be found by adding 1 to the current word's address.
False: To access the next word's address, 4 must be added to the current word's address to account for the size of the word. Adding just 1 is a common assembly language programming mistake.
The instruction ADDI X9, X9, #1 can be used either to increment an integer or to increment a pointer to an integer.
False: To increment an integer (advance to the next integer), the instruction should add 1 to the integer (a long long integer). To increment a pointer to an integer (advance to the next address), the instruction should add 8 to the pointer address, because each integer that p can point to uses 8 bytes.
When P calls Q, P should expect that Q might pop less from the stack than Q pushed to the stack.
False: Whatever Q pushes, Q should pop. The stack should be the same before and after the call to Q; no larger, no smaller. SP should be the same before and after the call.
Adding more registers to ARMv8 would likely improve performance.
False: While more registers would reduce the number of necessary loads and stores with memory, more registers are likely to lengthen clock wires and thus reduce clock frequency, overall hurting performance.
Is X32 a LEGv8 register?
False: X30 is the highest-numbered X register.
lex and yacc, automated tools for compiler construction, were developed as a part of the Windows operating system.
False: lex and yacc were developed as a part of the UNIX operating system, not Windows.
Java
Fewer lines: Java is newer than C and thus contains even more high-level constructs that results in fewer lines of Java. Each such line may compile to numerous assembly instructions.
_________, developed for IBM's 704 computer in 1954, was one the first widely used programming languages.
Fortran: John Backus and his team at IBM developed Fortran as a way to reduce the time to develop programs. Short for FORmula TRANslator.
Reads in a source program and translates the program to an intermediate representation.
Front End: The front end checks the syntax and semantics, reporting detected errors. Via different front ends, a program may even have parts written in different languages, each read into the intermediate representation and then processed by subsequent phases.
_____ is the abbreviation for a register that can be used for addresses or data with virtually any instruction.
GPR: GPR, short for general-purpose register, is the type of register found in ARMv8 architecture.
A loop that uses i to iterate from 0 to 9 has a first statement of x = 6. A compiler moves the x = 6 to just before the loop.
Global optimization: The x = 6 calculation need not be repeated every iteration, so can be pulled out of the loop, so that the calculation is only done once, and not 10 times (once per iteration). Global optimizations may move operations between basic blocks, as did this optimizations.
Relatively-big changes to a program that yield the same function, but may optimize a program's performance or other metric.
High-level optimizations: An example of a high-level optimization is procedure inlining, which replaces a procedure call (which can be slow) with the procedure's actual instructions (which may yield more instructions overall, but faster performance). Another example is loop-unrolling, which replaces a loop with groups of statements, each group corresponding to a particular loop iteration.
Programming language-based architecture
High-level-language computer architecture: Proposed in the 1960s, high-level-language architecture failed to make much of a commercial impact. Better compilers and programming languages, and growing memory sizes led to this architecture's demise.
What type of instruction is ADDI (add immediate)?
I-Type: If the immediate instruction's constant could only use the 5-bits of an R-type instruction's operand register (5 bits), only 32 constants would be possible. Instead, an I-type uses 12 bits for the constant.
The 8088 processors were used to power _________ computers in the 1980s. Apple Macintosh IBM PC Pentium 4
IBM PC: The commercial success of the IBM PC led to the rapid extensions of the x86 architecture.
After previous steps, a representation is generated consisting of basic operations, like ADD X0, X1, X2. High-level optimization IR generation
IR generation: Once a program's characters are parsed into tokens (scanning), checked for syntax (parsing), and analyzed for correct meaning (semantic analysis), a representation is generated for use by subsequent steps. That representation looks a lot like LEGv8 instructions (with infinite registers), but is not actually LEGv8 instructions.
Overflow
If the number that is the proper result of such operations cannot be represented by these rightmost hardware bit
iinc, 1, 1
Increment local variable 1 by 1 (i+=1)
Java bytecode
Instruction from an instruction set designed to interpret Java programs.
_________ is currently the most popular language to teach in schools and is the standard language for business data processing applications.
Java: Java, initially called Oak, implements a syntax similar to C++, but has an improved object-oriented design. The language is named after an island that grows coffee.
Lower
LO
A main program calls a Power procedure using the instruction: BL Power. That instruction is at address 1000. What happens to LR? -Nothing; BL is unrelated to LR. -LR is set to 1000. -LR is set to 1004.
LR is set to 1004 BL sets LR with the address of the next instruction, which is 4 more than 1000, so that the procedure will know where to return.
Lower or Same
LS
Less than
LT//signed N!=V // Unsigned C=0
Dynamically linked libraries (DLLs)
Library routines that are linked to a program during execution.
Dynamic data structures and pointers were major contributions of _________.
Lisp: Created by John McCarthy is 1958, Lisp equates programming to list manipulation. Lisp is commonly used by people working in artificial intelligence research. Short for LISt Processing.
How is conditional branching performed in MIPS?
MIPS compares two registers and then branches based on the comparison result: In MIPS, two registers are compared and the result of the comparison is stored in a third register. Then a conditional branching statement assess the value of the third register to see if the condition is true or false.
Which of the advantages of an interpreter over a translator was likely the most important for the designers of Java? -Ease of writing an interpreter -Higher performance -Smaller object code -Machine independence
Machine independence: The upside of interpretation is portability. The same Java program can run across a variety of platforms as long as the Java virtual machine is available. Today, Java virtual machines are found in hundreds of millions of devices, in everything from cell phones to Internet browsers.
2^62 memory doublewords
Memory[0], Memory [4], ..., Memory[4,611,686,018,427,387,904]: Accessed only by data transfer instructions. LEGv8 uses byte addresses, so sequential doubleword addresses differ by 8. Memory holds data structures, arrays, and spilled registers.
Not Equal
NE// Signed and unsigned Z=0
In two's complement, is the following number positive or negative?11110000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
Negative: Leftmost bit is the sign bit. The 1 means negative.
0000 1111 0000 0000 0000 0000 0000 0000 + 0111 0000 0000 0000 0000 0000 0000 0000 ----------------------------------------- 0111 1111 0000 0000 0000 0000 0000 0000
No overflow: The numbers being added are positive, and the result is positive (as indicated by the 1 in the leftmost bit). No overflow has occurred. Ex: 251,658,240 + 1,879,048,192 = 2,130,706,432.
0111 0000 0000 0000 0000 0000 0000 0000 + 1111 0000 0000 0000 0000 0000 0000 0000 ----------------------------------------- 0110 0000 0000 0000 0000 0000 0000 0000
No overflow: When positive and negative operands are added, overflow is impossible, because the result's magnitude will be less than the larger of the two operands. Ex: 1,879,048,192 + (-268,435,456) = 1,610,612,736.
Assuming X22 has 5000, is the following an acceptable instruction? LDUR X9, [X22, #7]
No: LDUR is a load register instruction and the computed address must be a valid doubleword address. Doubleword addresses are multiples of 8, so 7 + 5000, or 5007, is not a valid doubleword address. A different instruction exists to load a particular byte.
Addressing mode
One of several addressing regimes delimited by their varied use of operands and/or addresses.
1000 1111 0000 0000 0000 0000 0000 0000 + 1000 0000 1111 1111 1111 1111 0000 0000 ----------------------------------------- 0000 1111 1111 1111 1111 1111 0000 0000
Overflow: Overflow occurs when the numbers' sign bits match, but yield a sum with a different sign bit.The leftmost bits (sign bits) are added, which results in 0 with a carry of 1. A negative result is expected, but because numbers are represented as 32-bit values the carry bit is lost and the result appears positive. Ex: (-1,895,825,408) + (-2,130,706,688) ≠ 268,435,200.
y, =, x, +, 1, and ; are checked for correct syntax, and then converted to an abstract syntax tree. Scanning Parsing Semantic analysis
Parsing: Parsing notes that the syntax is correct, and generates a tree, perhaps with = as a node, with left child for the target y, and right child for the expression. If the tokens were y, =, x, +, 1, and . (instead of ;), the parser might report an error like: "Line 5: '.' unexpected"
In two's complement, is the following number positive or negative?00000000 00000000 00000000 00000000 00000000 00000000 00000000 00001111
Positive: The leftmost bit is 0 so it means positive.
The stored-program concept means: -Programs are stored in memory along with data. -A computer supports a store instruction. -Programs are stored on external disks.
Programs are stored in memory along with data. That feature enables simple yet powerful hardware.
1 iload_1
Push local variable 1 (i) onto stack
3 iload_2
Push local variable 2 (k) onto stack
0 aload_3
Push local variable 3 (save[]) onto stack
2 iaload_1
Put array element (save[i]) onto stack
What type of instruction is ADD?
R-Type: R-type uses bits 20:10 for two fields: an operand register (5 bits), and a shift amount (6 bits). The SUB instruction is similar.
Reduced instruction set computer architecture
RISC architecture: RISC architecture relies on small and simple instructions instead of more complex and specialized instructions. Most current instruction sets employ this architecture model.
In the instruction below, a, b, and c are operands. In such an arithmetic instruction, each operand comes from special hardware called a _____. ADD a, b, c
Register
The statement x = y + z originally uses three registers in the intermediate representation: ADD X9, X10, X11. A compiler decides that X9 is not needed after that operation, and thus modifies the operation to: ADD X10, X10, X11.
Register allocation: By using fewer registers for calculations, the compiler may reduce the need to save and later restore registers (register spills) if not enough registers exist for a calculation.
Register-register architecture
Register-resister architecture: Load-store architecture is a kind of general-purpose register architecture that restricts all operands to be in registers. The CDC 6600 of 1963, MIPS, and ARM employ this architecture.
Pop
Remove element from stack
LEGv8 assembly language
Requires most lines: Because assembly instructions are rigid, a single expression might require several instructions.
_____ is the abbreviation for a set of 70 instructions that provided eight 128-bit registers to the Pentium III processor.
SSE: SSE, short for Streaming SIMD Extensions, were introduced in 1999. The last version, SSE5, was introduced in 2007 and consisted of 170 instructions.
Opcode 1624 indicates a(n) _____ instruction.
SUB: The opcode 1624 indicates a SUB instruction. Opcode 1112 would be an ADD instruction.
lsl
Shift: Though LSL stands for logical shift left, LSL is not a logical instruction, but a shift instruction.
More registers may benefit an assembly program, but may lead to a _____ clock frequency.
Slower
No registers architecture
Stack architecture: No registers architectureIn the 1960s, believing that compilers were not good at register allocation, some companies eliminated registers and instead transferred operands onto and off of the stack, similar to what was done in Hewlett-Packard calculators.
PC-relative addressing
The branch address is the sum of the PC and a constant in the instruction Ex: In CBZ X5, Label1, the 64-bit machine code has the form oooooooo iiiiiiiiiiiiiiiiiii sssss(o's are the opcode for CBZ, and s is X5's register addresses). The 19-bit immediate (the i's) are sign-extended to 32 bits. In other words, PC = PC + sign-ext32(iiiiiiiiiiiiiiiiiii).
More kinds of decision statements mean fewer lines of code, which generally reduces coding time.
True: A C programmer can choose the statement, like if-else, switch, while loop, or for loop, that most directly matches the desired functionality.
An assembler is used to convert an assembly language program to a machine language program.
True: A compiler and assembler together can convert a high-level program to a machine language program.
Using standard instructions can result in higher performance than using powerful instructions crafted specifically for an architecture.
True: A standard instruction to load data into registers and then store the registers in memory performs faster than the x86's more complex move instruction.
An AND operation can isolate a field in a doubleword.
True: AND with a mask pattern of 1s will leaves 0s everywhere but the desired field. Note that the AND operation leaves the field where it was originally. Ex: If x is 10101010 and mask y is 00111100, then x AND y preserves the middle four bits of x and makes the other bits 0's: x AND y is 00101000.
ARMv8 has more general purpose registers than ARMv7.
True: ARMv8 has 32 general purpose registers, with one dedicated to the value 0. ARMv7 only has 15 general purpose registers, with no dedicated register for 0.
For ADD, ADDI, and LDUR instructions, Rn represents a register.
True: All three instructions indeed use Rn for a register. In ADD and ADDI, Rn indicates a source register. In LDUR, Rn indicates the instruction's base register.
MOV is a pseudoinstruction as a convenience for the assembly language programmer.
True: MOV is not an actual assembly instruction, but is provided by the assembler to make assembly programming easier.
All of the saved registers and local variables for a procedure call are referred to as an activation record.
True: Also referred to as a procedure frame. May contain numerous saved registers like copies of registers X19 - 27, LR (X30), and X0 - X7, local variables that didn't fit into registers, etc. If a procedure calls another procedure, then multiple activation records may appear on the stack.
An executable file is a program that can be run on the computer and has no unresolved references.
True: An executable shares the format of an object file, except that an object file can have unresolved references.
Assembly language programs are not easily portable because of the many different architectures of current and future computers.
True: Assembly language instructions differ depending on a computer's architecture. Therefore, assembly code must be converted or updated to work with different or newer computer architectures.
Assembly language adds a level of abstraction to a computer by allowing programmers to write code that is translated into binary numbers that the computer can read.
True: Assembly language, and even higher-level programming languages like C, allow programmers to tell a computer what to do, while hiding the low-level details.
More decision statements mean fewer lines of code, which generally results in the execution of fewer operations.
True: Because a C programmer can choose a statement that most directly matches the desired functionality, less indirect tricks are needed that might have introduced more operations.
An instruction at address 985 has a label SUM. The assembler might put the following in a symbol table:SUM: 985
True: By keeping a symbol table, the assembler knows the target address for other instructions that jump or branch to a label.
LEGv8 allows a procedure to modify registers X9-X17 without saving those registers to the stack and restoring those registers upon returning.
True: By not requiring registers X9-X17 to be saved/restored, procedures can execute faster, having fewer store/load instructions. However, the caller program must be careful not to expect values in registers X9-X17 to be preserved during a procedure call.
More kinds of decision statements make code easier to read and understand.
True: C is the language of the programmer, so readability and understandability are important. LEGv8 is less commonly read by a programmer.
C leads to more pointer bugs and memory leak bugs than does Java.
True: C programmers manage data explicitly, so forgetting to free space can lead to memory leaks and freeing space too early can lead to dangling pointers. Java uses garbage collection to automatically determine when data is unused and frees such locations, so pointer bugs and memory leaks are less common, but on the other hand efficiency and programmer attentiveness to resource usage may suffer.
C programmers manage data explicitly, while data management is automatic in Java.
True: C programmers use malloc() and free() to manage space on the heap. Java uses automatic memory allocation and garbage collection.
A compiler converts a high-level program, such as a C program, into an assembly language program.
True: Compilers also exist for other high-level languages like C++ and Java. High-level language program are easier to understand and have fewer lines of code than assembly language programs.
Current C compilers tend to ignore coded hints regarding register allocation.
True: Current C compilers are generally better at register allocation than a programmer; therefore, the compilers ignore such hints. Older C compilers were poor at register allocation, so programmers could provide hints regarding which variables to keep in registers.
If a program has a procedure P that calls itself recursively, and a bug causes P to just keep calling itself recursively without end, eventually the stack will run into the heap, causing an error.
True: Each call adds an activation record to the stack, growing downwards. Eventually, the stack will hit the heap, and the program will fail.
A string in C takes about half the memory as the same string in Java.
True: Each character in C requires 8-bits, while each character in Java requires 16-bits. Thus, a sequence of characters in C requires about half the memory as the same sequence of characters in Java.
An x86 instruction can have an operand in memory.
True: Essentially any x86 instruction can have an operand in memory, unlike MIPS and ARMv7 instructions whose operands must be in registers.
AND can be used to mask out particular bits (forcing those bits to 0's).
True: Ex: ANDing with 00001111 masks out the leftmost four bits, as in 10101010 AND 00001111 yielding 00001010.
OR can be used to set particular bits to 1
True: Ex: ORing with 00001111 forces the rightmost four bits to 1's, as in 10101010 OR 00001111 yielding 10101111.
In early compilers, processes such as parsing and scanning consisted of ad hoc approaches. These processes were replaced by tools derived from automata theory.
True: For newer compilers, tools based in theory are created to automate certain processes.
Local variables v and w saved to the stack can be accessed as offsets from the frame pointer.
True: If the frame pointer is 2000, v might be at 2000 − 24, and w at 2000 − 32, for example. The frame pointer points to the first word of the frame, where registers are saved.
ARMv8 and MIPS both have a dedicated register for the value 0.
True: In MIPS, the dedicated register is $zero and in ARMv8, the dedicated register is XZR. Conversely, ARMv7 does not have a dedicated register for 0.
Instructions, as well as data, can be stored in memory as numbers.
True: Instructions can be represented as just 0's and 1's, leading to the basic concept of the "stored-program": Both instructions and data can be stored in memory as numbers.
Fewer kinds of decision statements simplify the task of the underlying layer that is responsible for execution.
True: Less hardware is needed to support those few statements; more kinds of statements may mean more hardware.
Memory containing variables local to a procedure may be reused as soon as the procedure returns.
True: Pointers to local variables should not be used to return results from a procedure because the memory may be reused and no longer contain the procedure's local variables.
Upon computing a value to return, the procedure might copy that value into register X0.
True: Registers X0-X7 are also used to return values to the caller program. The caller program should read from those registers as appropriate.
A shift left followed by a shift right operation can isolate a field in a doubleword.
True: Shifting left by the correct amount removes the bits from the left of the field. Shifting right by the appropriate amount puts the field into the rightmost bits of the doubleword, with 0s in the rest of the doubleword. The shift pair moves the field into the rightmost part of the doubleword. Ex: If z is 11101100, the middle four bits can be isolated by shifting left two places to yield 10110000, then right four places to yield 00001011.
Procedure X needs 30 local variables. P will almost certainly need to put some of those local variables on the stack.
True: Some of those variables can use X9 - X17 (though using X16 - X18 is discouraged), or X19 - X27 (after spilling those registers to the stack). For the additional variables, X will likely put those variables on the stack.
Strings are just an informal name for single-dimension arrays of characters in C and Java.
True: Strings are stored as a sequence of characters in memory. Strings can contain a variable number of characters such as letters, numbers, spaces, and symbols like $.
The heap typically grows upwards in memory, while the stack grows downwards.
True: Such an approach allows either the stack or heap to grow to be very large in available memory, without having to decide beforehand how much of that memory will be reserved for stack and how much for heap.
ARMv7 has an optional divide instruction.
True: The ARMv8 and MIPS core ISAs have a divide instruction, but the divide instruction is optional in the ARMv7 core ISA.
Is XZR a LEGv8
True: The XZR register always contains 0 (ZR is short for ZERO), which can be convenient for assembly programmers.
An instruction jumps to label SUM. If a symbol table has SUM's address as 985, then the jump will be to address 985.
True: The address may not have been known by the assembly language programmer, but the assembler can determine the addresses, keeping those addresses in a symbol table.
If an array's size is 5 elements, and int size has a value of 5, &array[size] returns the address of the first doubleword after the array.
True: The last element of the array is found at &array[size-1], or &array[4]. So &array[5] comes directly after the array.
P should always save LR on the stack.
True: When P calls another procedure Q using BL, LR will be overwritten so that Q can return to the next instruction in P. But then LR no longer indicates where P should return to. Thus, P should save LR to the stack, and then restore LR before returning.
ARMv8 instructions and pseudoinstructions correspond to operations and constructs used in higher-level programming languages.
True: When a high-level language program is written, a compiler can convert the operations and constructs of the program into a series of ARMv8 instructions.
Keeping all instructions the same size is a compromise the ARMv8 instruction set makes to maintain simplicity and regularity.
True: While other architectures have registers that allow instructions of different sizes, ARMv8 instructions are all the same size.
Is X0 LEGv8 registers?
True: X0, X1, ..., X30 are all valid registers.
In a two's complement representation, the magnitude of the largest negative value is one greater than the magnitude of the largest positive number.
True: Zero is one of the positive values, leaving one less value available for the other positives. Ex: For an 8-bit two's complement representation, the most negative value is -128 (10000000), while the most positive value is 127 (01111111).
ADD X1, X2, X3
Valid LEGv8
ADDI X1, X2, 50
Valid LEGv8
Given the importance of registers, what is the rate of increase in the number of registers in a chip over time?
Very Slow: Since programs are usually distributed in the language of the computer, there is inertia in instruction set architecture, and so the number of registers increases only as fast as new instruction sets become viable.
A procedure Power computes X0 to the power of X1. In which register should Power write the result before returning? -X0 -X19
X0 The values returned from a procedure are placed in the same parameter registers, X0-X7.
32 registers
X0...X30, XZR: Fast locations for data. In LEGv8, data must be in registers to perform arithmetic, and register XZR always equals 0.
If the value of X19 is 3 and the value of X1 is 3, will the loop exit after the following instructions? (Answer yes or no.) CMP X19, X1 B.GE exit1
Yes: Instruction B.GE will go to exit1 (exit the loop) because the CMP instruction reports that X19 is greater than or equal to X1. These instructions form a portion of the loop test part of a for loop, comparing i ≥ n.
Does every byte in memory have a unique address?
Yes: Thus, each byte is addressable. However, programmers usually access memory by words and doublewords.
When do you use primitives like load exclusive and store exclusive? When cooperating processes on a uniprocessor need to synchronize for reading and writing shared data.
Yes; Multiple processes, regardless of whether processes are from a single processor or from multiple processors, may result in a data race. Thus, synchronization is needed for reading and writing shared data.
When do you use primitives like load exclusive and store exclusive? When cooperating threads of a parallel program need to synchronize to get proper behavior for reading and writing shared data.
Yes; Threads must synchronize the reading and writing of shared data or a data race may occur, where the results of the program can change depending on how events happen to occur.
What is "CBNZ" short for?
compare and branch if not zero: If the register's value is not equal to 0, execution branches to the labeled instruction. If the value is equal to 0, execution falls through to the next instruction.
cbw
convert byte in eight right most bits of EAX to 16-bit word in right of EAX
movs
copies from string source to destination by incrementing ESI and EDI; may be repeated
base register
is a register that holds an array's base address (X22 below)
destination register
is a register that receives the result of an operation.
Meaning of LDXR Load address Load exclusive register
load exclusive register: LDXR and SDXR (store exclusive register) are data transfer instructions that perform exclusive access to memory for multiprocessors. LDA is the pseudoinstruction meaning load address.
Opcode 1986 indicates a _____ instruction.
load register: Seeing 1986 in the first 11 bits, the hardware recognizes the instruction as load register, and interprets the remaining fields as a D-type instruction, including an offset (address, 16 bits), op2 (2 bits), base register (5 bits), and a destination register (5 bits).
ands
logical: ANDS is a logical instruction that sets flags for condition codes.
loop
loop branch
move
move between two registers or between register and memory
mov
move wide: MOV is a pseudoinstruction to move a register.