Computer Architecture 411 Exam 2

Convert from binary to hex: a. (1011110000010110)2 = ____________________ 16

BC16

Consider the IEEE 754 single precision floating point number representation. Determine the 32 bit pattern that represents the smallest normalized positive number that can be represented and also give decimal value.

0 000 0000 1 000 0000 0000 0000 0000 0000 Equivalent decimal value: 1.0 * 2-126, which is approximately 1.17549435 * 10-38.

Consider the IEEE 754 single precision floating point number representation. Determine the 32 bit pattern that represents the largest normalized positive number that can be represented and then give decimal value.

0 111 1111 0 111 1111 1111 1111 1111 1111 Equivalent decimal value: approx. 2.0 * 2+127, which is approximately 3.4028235 * 10+38.

A computer handles signed integers in the range -128 to +127 in 2's complement form, using eight bits. Determine the 8-bit representation for the following signed integer. +39

0010 0111 base 2

A computer handles signed integers in the range -128 to +127 in 2's complement form, using eight bits. Determine the 8-bit representation for the following signed integer. -42

1101 0110 binary. Using 2's complement to make it negative, 42 is 0010 1010, flip the bits to 1101 0101. Then add 1 to make 1101 0110. Thus, -42 is 1101 0110.

Consider the following decimal number: -48.625. Determine its IEEE 754 normalized single precision floating point number representation, and write down the answer in hexadecimal notation.

C2428000. Binary is 1100000.101 = 1.10000101 * 2^5. Sign = 1 = value negative. Exp 5 in excess 127 = 132. Exp 8 bits = 1000 0100 for 32. Fraction = 100 0010 1000 0000 .... 23 bits. Hence: Sign Exp (8) Fraction (23) 1 100 0010 0 100 0010 1000 0000 0000 0000 = C 2 4 8 0 0 0 0

Consider the following sequence of hex digits: C A F E 0 0 0 0. Suppose the above is interpreted as an IEEE 754 single precision floating point number written in hexadecimal form. Determine its equivalent decimal value. Show explicitly the sign of the number and the sign of the exponent.

CAFE000 = -8,323,072 decimal. Convert to binary: 1 100 1010 1 111 1110 0000 0000 0000 0000 1 = Sign, 100 1010 1 = 8 bit exponent, 111 1110 0000 .... is 23 bit fraction. Sign = 1 = negative. Exponent in excess 127 is 1001 0101 = 149, 149 - 127 = +22 for real exponent. Fraction is 1.111 111 in binary, value is -(1.111111) base 2 * 2^22 or -(1111111) 2 * 2^16. Decmial is -127 * 65,536.

Convert from hex to octal: b. (3AF2)16 = ( )8

Convert to binary first, then group by 3's to get octal. 0011 1010 1111 0010 = 000 011 101 011 110 010 base2 = 035362 base 8.

Describe details of destructive readout, leakage and refreshing.

DRAM has capacitors that can be charged or discharged. Reading the content of a memory location discharges the capacitors, thus destroying the data stored in it. This is called destructive readout. Hence in DRAM as soon as a byte of data is read, it must be written back in. As said before, DRAM memory is an array of capacitors and the charge held in the capacitors represent 0 or 1. The capacitors leak and over a period of time data is lost. Hence, periodically, memory has to read and written back.

T/F In signed 1's complement representation, there is only one representation for zero.

False, +0 and -0.

T/F Unicode has sufficient number of code points to represent all characters in all spoken languages of the world.

False, not enough for all - including Japanese.

T/F Any combinational logic circuit of interest can be built using only XOR gates.

False,, cannot realize OR gate.

Compare SRAM and DRAM in terms of speed, power consumption, destructive or non-destructive readout, capacity on a chip and price.

SRAM, D flip-flops with 10 transistors per bit, lower capacity per chip, higher power consumed, non-destructive readout, faster than DRAM and more expensive than DRAM. DRAM array of tiny capacitors, one transistor per bit, high capacity on chip, lower power consumed, destructive readout, slower and cheaper than SRAM.

We need to implement a three input (A, B, and C), one output (F) Boolean function F = AB + A'C. Only one 7400 (Quad 2-input NAND gate) small scale integrated circuit chip with 14 pins is available. Show the wiring diagram to implement the function.

See exam solutions for diagram. Feed A into pins 13 & 12 to get A' output in pin 11. Feed A' into pin 10 and C into pin 9 to get (A'C)' output in pin 8 which feeds into into pin 5. Feed A into pin 1 and B into pin 2 to get result A'B' in pin 3 output which feeds into input pin 4. Pin 4 (A'B') & 5 [ (A'C)' ]combine in Nand Gate to give result output in Pin 7 of AB + A'C using DeMorgans Law. Z = (XY)' = X' + Y'

Consider the following eight bits of data: b7 b6 b5 b4 b3 b2 b1 b0 We need to compute a ninth bit b8, which we will call as the parity bit. The parity bit is 0 if the number of data bits that are 1 is even; the parity bit is 1 if the number data bits that are 1 is odd. You may use any of the following kind of gates: AND, OR, NOT, and XOR. Each gate takes at most two inputs.

Simplest is one XOR gate. Truth table is below. X | Y | Output -------------- 0 | 0 | 0 Output is 0 parity is even. 0 | 1 | 1 Output is 1, parity is odd. 1 | 0 | 1 1 | 1 | 0 1) If we have 3rd or 4th or more inputs, we simply get result of first 2 inputs use that result to compare to 3rd. Continue this way indefinitely, one gate at a time. Example: Feed b0 and b1 into XOR, get result and combine with b2 to get next answer. Take results of b2 and b0b1 parity, combine with b3 and get result of 1 or 2. Use 7 XOR gates with final answer of b8 giving parity. 2) Alternate method is feeding b0b1 into XOR gate, b2b3 into another XOR, b4b5 into another and b6b7 into another. Take results of b0b1 with results of b2b3 and feed into 2nd XOR gate (which will then be fed into 3rd XOR gate giving parity at b8). Also take results of b4b5 with b6b7 and feed into a 2nd XOR gate to get results, then feed that result into same XOR gate with b0b1b2b3 so you have answer after 3rd gate. Starts with 4 gates, 2 gates and ends with all combined through same final gate giving b8 parity.

6. Add the following 8-bit signed integers and determine the sum. Show explicitly the carry at each bit position. Also state explicitly if there is an overflow or not. 0101 1010 + 0101 1101.

Sum: 1011 0111 with overflow. See below. Carry: 0 1011 0000 Carry is 1, Lead: 0101 1010 Lead is 0 showing positive, Add: 1011 0111 ------------------------------- Sum: 1011 0111 Sum sign = 1 != 0, not the same. 1 = negative, but 2 positives do not equal negative. Lead sign 0 not equal to carry = 1 so has overflow.

T/F To perform A - B, i.e., to subtract B from A, where A and B are two 32-bit integers in signed 2's complement form, feed A and the bit by bit complement of B to a 32-bit full adder circuit as two inputs and set the Carry In for the least significant bit as 1.

True, it is A + (-B).

T/F CMOS technology uses less power than TTL technology and hence is preferred for portable devices.

True. Complementary Metal-Oxide Semiconductor has low power, low noise and used by most modern CPUs. MOS is used for circuits. TTL (Transistor-Transistor Logic) is one of the oldest, high power consumption, slow and simpler design rules.

T/F In IEEE 754 single precision representation for floating point numbers, 7F800000 represents positive infinity.

True. IEEE 754 uses 1 bit sign, 8 bits exponent, and 23 bits fraction. Sign bit of 0 means positive and infinity is represented by all 8 bits of 1's in exponent and 23 bits of 0s in fraction. 7F800000 is 0111 1111 1000 0000 ....

3. Consider the following Java code. byte num1; short num2; num1 = <some unknown value>; num2 = num1; What will resulting 16 bit number be if num 1 is b7 b6 b5 b4 b3 b2 b1b0

b7 b7 b7 b7 b7 b7 b7 b7 b7 b6 b5 b4 b3 b2 b1 b0 We took the first sign bit of 8 bit number (which shows sign of num 1) and fed it into fields b15 to b8 since it would show positive or negative. This is called sign bit extension or sign bit propagation. Either way it would be filled with all 0's or 1's.

How many #'s of bits are allocated for variable below and give the range of values handled. byte, short, int and long. These are values used in Java integers.

byte = 8 bits, range -2^7 to s^7 --1 = -128 to +127 short = 16 bits, -2^15 to 2^15-1 = -32,768 - 32,7676 int = 32 bits, range is -2^31 to 2^31-1 long = 64 bits, range -2^63 to +2^63 - 1