Computer Architecture Exam 3

Hit Ratio

Same as hit rate

Miss Ratio

Same as miss rate

Cache hit

The fraction of memory accesses found in a level of the memory hierarchy

Cache miss

The fraction of memory accesses not found in a level of the memory hierarchy

Miss penalty

The time required to fetch a block into a level of the memory hierarchy from the lower level, including the time to access the block, transmit it from one level to the other, insert it in the level that experienced the miss, and then pass the block to the requestor

Average Memory Access Time

Time for hit + miss rate * miss penalty

TLB

Translation-lookaside buffer. Similar to an index card for locating recent translations.

Cache Memory

An auxiliary memory from which high-speed retrieval is possible

Cache Block (or line)

Basic unit for cache storage. May contain multiple bytes/words of data.

Dirty Bit

Indicates whether a block has been modified.

Write-back

Misses are simpler and cheaper because they never require a block to be written back to the lower level. Easier to implement than write-back

Write-through

Policy for writing data. Words can be written at the rate the cache can accept them (rather than the memory). Multiple writes within a block require only one write to the lower level.