CSIS 165 Final Study Guide

Given the following machine instruction, what register is used as the destination register? 000000 00000 01101 01100 00000 100000

$t4

Given the processor circuit below, what are the bits of the following items if instruction bne $t2, $t5, LABEL is executed? Assume $t2 = 5 and $t5 = 10. alu_eq = _____, pc_s = _____

0, 1

Given the processor circuit below, what are the control logic actions of rf_wa_s, rf_wd_s, and add_sub if instruction sub $t2, $t3, $t0 is executed? rf_wa_s = _____, rf_wd_s = _____, add_sub = _____

0, 1, 1

Given the processor circuit below, what are the bits of the following items if the instruction add $t2, $t3, $t4 is executed? Assume $t3 = 8 and $t4 = 6. alu_less = _____, ALU output = _____

0, 14

Given the address of Label is 001100..001100, which of the following machine instructions is equivalent to j Label?

000010..000011

The binary number 00000000 00001111 11101111 11001010 (1044426 in decimal) is to be stored in word 32 in little-endian format. Indicate the byte address of each byte. What is the value stored in byte address 34?

00001111

Which of the following machine instructions performs an addi operation? Examples of machine instructions can be found in the table below.

001000 01011 01100 0000000000001000

Instruction j Label is at address 001110..0100. Given an immediate field of 0..1010 (26 bits), what address will the CPU construct?

001110..001010

A sender sends eight bits of data using serial communication. Stop bits are 1's and the start bit is 0. The receiver receives the following bitstream: 1111000111011111. Which bits are data bits?

00111011

Given the processor circuit below, what is the address of the RF's write port in binary if instruction add $t0, $t1, $t2 is executed? Machine instructions: 000000 01001 01010 01000 00000 100000 wa = _____

01000

Given the processor circuit below, what are the addresses of the RF's read ports in binary if instruction lw $t1, 0($t2) is executed? r1a = _____, r2a = _____ Machine instruction: 100011 01010 01001 0000000000000000 r1a = _____, r2a = _____

01010, 01001

Given the processor circuit below, what are the control logic actions of rf_we, rf_r1e, and rf_r2e if instruction addi $t3, $t0, 4 is executed? rf_we = _____, rf_r1e = _____, rf_r2e = _____

1, 1, 0

Given the processor circuit below, what are the bits of the following items if machine instruction 000011 00000000000000000000000110 is executed? pc_s = _____, rf_wa_s1s0 = _____, rf_wd_s1s0 = _____

1, 10, 10

For instruction beq $t0, $t1, Label, the beq instruction's address is 20, and Label's address is 16. What is the machine instruction's 16-bit immediate field?

1..1110

Determine the result of the following binary floating-point addition:1.001×22+1.101×22.

1.0110×23

Identify a statement that is true of precision using a fixed number of bits. 7 can be represented using two fraction bits 1/8 can be represented using three fraction bits 1/11 can be represented using three fraction bits 6/9 can be represented using two fraction bits

1/8 can be represented using three fraction bits

What comes after the binary number 0111?

1000

Which addition results in an overflow? 0110 + 1000 1010 + 1001 1001 + 0010 0011 + 0001

1010 + 1001

The following instruction sequence is placed in instruction memory starting at address 100. What are the addresses for L1 and L2? Label1 = _____, Label2 = _____ slt $t1, $0, $t0 bne $t1, $0, L1 addi $t2, $t0, 1 j L2 L1: lw $t1 0($t3) sub $t1 $t1, $t0 L2: addi $t2, $t1, 8

116, 128

The following instruction sequence describes arguments being pushed into the stack before jumping to subroutine CalcEq. How many arguments are passed to the subroutine CalcEq? Assume CalcEq returns a value. addi $sp, $sp, -4 sw $t0, 0($sp) addi $sp, $sp, -4 sw $t1, 0($sp) addi $sp, $sp, -4 jal CalcEq

2

Determine the result of the following decimal floating-point addition:7.2×102+2×105

2.0072×105

Given the following register file contents, what is the value of $t3 after executing the instruction sequence? REGISTER FILE $t1= 5 $t2 = 5 $t3 = 10 bne $t1, $t2, L1 addi $t3, $t3, 5 L1: addi $t3, $t3, 5

20

A processor running a program makes 100 accesses to memory addresses. 80% are to L1 only, 10% are to L2 and L1, and 10% are to memory, L2, and L1. What is the total number of cycles? Assume cycles simply add, so the 1 access that involves memory takes 10 + 2 + 1 = 13 cycles.

240

Given the following register file contents, what will be the value of $t3 after executing the instruction sequence? addi $t1, $t1, 2 sub $t3, $t2, $t1 REGISTER FILE $t1 = 5 $t2 = 10 $t3 = 2

3

Consider 4 processors P1, P2, P3, P4 on a rotating priority scheme. P1's priority level is 3, P2's is 4, P3's is 1 and P4's is 2. After P2 is granted access and completes the access, what is P1's priority level?

4

Given an 8-bits memory address and a 2-way set-associative cache with 64-bytes capacity and 2-byte block size, how many bits is index and tag? Index = _____ bits, Tag = _____ bits

4, 3

Given the following program, if PC is 84 when an interrupt is detected, what is the address of the next instruction executed? 80 addi $t1, $zero, 5008 84 lw $t5, 0($t1) 88 mul $t5, $t5, $t2 4000 # ISR instructions 4004 ... 4008 eret

4000

Assume EPC is 72, and assume the CPU is executing the instruction at address 4016, which is part of the ISR. If the CPU's interrupt is asserted, what is the address of the next instruction executed?

4020

What is the decimal equivalent of the hexadecimal number 2A?

42

Given the following data memory (DM) contents and assuming $t2 holds 2208, what is the value of $t3 after executing the instruction sequence? lw $t1, 0($t2) lw $t3, 0($t1)

60

For instruction beq $t0, $t1, Label, Label's address is 24. What is the beq instruction's address if the machine instruction's 16-bit immediate field is 0..0011?

8

256-byte memory chips (8 address inputs) are composed into a 2 KByte memory (11 address inputs). Determine the decoder size required to activate one of the chips. A 1 × 2 decoder A 3 × 8 decoder A 2 × 4 decoder A 4 × 16 decoder

A 3 × 8 decoder

Which is true of a 64 × 8 ROM? A 64 × 8 ROM has 64 floating-gate transistors A 64 × 8 ROM has 512 locations, each with 16 bits A 64 × 8 ROM has 8 floating-gate transistors A 64 × 8 ROM has 64 locations, each with 8 bits

A 64 × 8 ROM has 64 locations, each with 8 bits

Which of the following statements is true of DRAM design? A DRAM cell is non-volatile, thus refreshing of lost charge is not required A DRAM cell leaks; thus, it requires repeated reads and writes to refresh the cell A DRAM cell is larger than an SRAM cell A DRAM cell stores a bit as a charge on transistors

A DRAM cell leaks; thus, it requires repeated reads and writes to refresh the cell

Given the cache and its content below, what happens if a processor reads from memory address 10101?

A cache miss occurs.

Which of the following statements about virtual memory is true? A page hit happens when the requested data is in the virtual memory. The least recently used (LRU) replacement policy is effective due to spatial locality. A page table for a program records all the pages of the same program. Virtual memory provides faster data access than physical memory.

A page hit happens when the requested data is in the virtual memory.

Given $t1 = 8, $t2 = 5, $t3 = 7, and $t4 = 3, what is the instruction sequence that stores the values of 3 + 7 in both register $t5 and the memory location DM[1005]?

Add $t5 = $t4 + $t3 Store $t5 to DM[1005]

In a MIPSzy processor, when is PCincremented by 4?

After the instruction is fetched and before the instruction's actions are carried out.

Which of the following is true of audio?

Audio is an analog signal, which changes continuously over time

Assume $t0 is used for the first parameter, $t1 for the second parameter, and $t2 for the return value. Convert the following C statements to assembly. int CalcFunc(int aVal, int bVal) { return 2 * bVal - aVal; }

CalcFunc: addi $t3, $zero, 2 mul $t2, $t3, $t1 sub $t2, $t2, $t0 jal $ra

Assume $t0 is used for the first parameter, $t1 for the second parameter, and $t2 for the return value. Convert the following C statements to assembly using the program stack. int CalcFunc(int aVal, int bVal) { return 2 * (bVal - aVal); }

CalcFunc: lw $t0, 8($sp) lw $t1, 4($sp) addi $t3, $zero, 2 sub $t2, $t1, $t0 mul $t2, $t3, $t2 sw $t2, 0($sp) jal $ra

Which of the following statements is a valid assignment statement? record Scores{ int English; int Chemistry; int Mathematics; }; Scores Emma; Scores Albert; Emma:Mathematics = 25; Scores.Chemistry = 48; Scores:Chemistry = 48; Emma.Mathematics = 25;

Emma.Mathematics = 25;

Received bits are 10100111. Even parity is used. What is the received data?

Error

Eight 1 KB memory chips (10 address inputs) named C0, C1, ..., C7 (top to bottom) are composed into an 8 KB memory (13 address inputs). Which of the following sentences is true in this case? For address 0110110000000, chip C0 is activated For address 0110110000011, chip C2 is activated For address 1010000000111, chip C7 is activated For address 1010000000111, chip C5 is activated

For address 1010000000111, chip C5 is activated

Which of the following is true of the digital graphic? The green pixel in the given graphic is represented as FFFFFF Decreasing the pixels per inch in the above graphic will provide a more accurate digitized image Increasing the pixels per inch in the above graphic will provide a more accurate digitized image The white pixel in the given graphic is represented as 000000

Increasing the pixels per inch in the above graphic will provide a more accurate digitized image

A 20-character text has these character frequencies: L: 7 M: 6 N: 4 O: 2 P: 1 What is the second merge using Huffman coding?

OP and N

Identify a true statement about two's complement representation.

Two's complement representation inverts every bit of a binary number and adds 1 to the number

A(n) _____ cable has 4 wires, one for power, one for ground, and two for data.

USB

Assume x is in $t0 and y is in $t1. Convert the following C statements to assembly. for (x = 2; x < 10; x = x + 2) { y = x + y; }

addi $t0, $zero, 2 addi $t2, $zero, 10 Loop: bge $t0, $t2, After add $t1, $t0, $t1 addi $t0, $t0, 2 j Loop After:

Assume x is in $t0 and y is in $t1. Convert the following C statements to assembly. x = 5; while (x > 0) { y = y + 2; x = x - 1; }

addi $t0, $zero, 5 Loop: ble $t0, $zero, After addi $t1, $t1, 2 addi $t0, $t0, -1 j Loop After:

Assume x's base address is in $t0 and i is in $t1. Convert the following C statement to assembly. i = 0; while (i < 4) { x[i] = x[i] + 1; i = i + i; }

addi $t1, $zero, 0 addi $t2, $zero, 4 Loop: bge $t1, $t2, After mul $t3, $t1, $t2 add $t3, $t3, $t0 lw $t4, 0($t3) addi $t4, $t4, 1 sw $t4, 0($t3) addi $t1, $t1, 1 j Loop After:

Which of the instructions is equivalent to the following instruction sequence? slt $t0, $t2, $t1 beq $t0, $zero, BLabel ble $t2, $t1, BLabel bgt $t2, $t1, BLabel bge $t2, $t1, BLabel blt $t2, $t1, BLabel

bge $t2, $t1, BLabel

Assume $t0 has x's value, $t1 has y's value, and $t2 has z's value, convert the following C statements to assembly. if (y <= z) { x = z; } x = x + 1;

bgt $t1, $t2, After add $t0, $t2, $zero After: addi $t0, $t0, 1

Assume $t0 has x's value, $t1 has y's value, and $t2 has z's value, convert the following C statements to assembly. if (y == z) { x = y + 5; } else { x = z; } x = x + 3;

bne $t1, $t2, Else addi $t0, $t1, 5 j After Else: add $t0, $t2, $zero After: addi $t0, $t0, 3

A DMA controller _____.

copies data from the memory and sends the data to the requesting device.

Which instruction does an ISR end with?

eret

Differential signaling uses two wires, if one is low the other is _____.

high

A printer is requesting processor servicing using handshake communication. Assume ireq and iack are initially 0's. Which XXX completes the given order of events? ireq = 1 Device waits XXX ireq = 0 iack = 0

iack = 1

Which of the expressions is equivalent to the following instruction sequence? slt $t2, $t0, $t1 beq $t2, $zero, L1 sub $t3, $t1, - $t0 j End L1: sub $t3, $t0, - $t1 End: if ($t0 < $t1) $t1 = $t0 - $t1 else $t3 = $t1 - $t0 if ($t0 > $t1) $t3 = $t1 - $t0 else $t1 = $t0 - $t1 if ($t0 > $t1) $t1 = $t0 - $t1 else $t3 = $t1 - $t0 if ($t0 < $t1) $t3 = $t1 - $t0 else $t1 = $t0 - $t1

if ($t0 < $t1) $t3 = $t1 - $t0 else $t1 = $t0 - $t1

In a MIPSzy processor, what instruction bits form the instruction opcode? Use the figure below as a reference.

ir31_26

In a MIPSzy processor, what instruction bits are needed to determine an add operation? Use the figure below as a reference.

ir5_0 AND Ir31_26

Given the following priorities configured in a programmable interrupt controller. Which scenario will ensure that Device 3 will be serviced (based on the priorities)? Dev0 Priority: 2 Dev1 Priority: 1 Dev2 Priority: 4 Dev3 Priority: 3

ireq0 = 1, ireq1 = 1, ireq2 = 0, ireq3 = 1

Given x's address = 4000 and y's address = 4004, complete the assembly instructions for the following C statements. int x; int y; y = x; Assembly instructions: addi $t0, $zero, 4000 addi $t1, $zero, 4004 ...

lw $t2, 0($t0) sw $t2, 0($t1)

Given the following register file contents, which instruction sequence writes $t1 with the result of 25 - 4 * 5? REGISTER FILE $t1 = 4 $t2 = 5 $t3 = 25 mul $t0, $t1, $t2 sub $t1, $t3, $t0 sub $t0, 25, 2 mul $t1, 4, 5 sub $t0, $t3, $t1 mul $t1, $t1, $t2 mul $t0, 4, 5 sub $t1, 25, $t0

mul $t0, $t1, $t2 sub $t1, $t3, $t0

Which of the following native instruction sequences is equivalent to the pseudoinstruction mul $t0, $t1, $t2? mult $t1, $t2 mflo $t0 mult $t1, $t2 mfhi $t0 mult $t0, $t1 mflo $t2 mult $t0, $t1 mfhi $t2

mult $t1, $t2 mflo $t0

Which of the following instruction sequences is equivalent to the instruction ble $t0, $t1, BLabel? slt $t2, $t1, $t0 beq $t2, $zero, BLabel slt $t2, $t1, $t0 bne $t2, $zero, BLabel slt $t2, $t0, $t1 beq $t2, $zero, BLabel slt $t2, $t0, $t1 bne $t2, $zero, BLabel

slt $t2, $t1, $t0 beq $t2, $zero, BLabel

What operation does the following machine instruction perform? 000000 01011 01110 01001 00000 100010

sub

Assume $t0 has x's value, $t1 has y's value, and $t2 has z's value, what is the assembly that translates the following C statement and uses the least number of registers? y = (x - z) - (x + z)

sub $t3, $t0, $t2 add $t1, $t0, $t2 sub $t1, $t3, $t1

Given the following data memory (DM) and register file contents, which instruction performs the operation DM[5300] = 5304? DATA MEMORY (DM) 5300 30 5304 40 5308 50 REGISTER FILE $t3 = 5300 $t4 = 5304 $t5 = 5308 sw $t3, 0($t4) sw $t4, 0($t3) sw $t4, 0($t5) sw $t3, 0($t5)

sw $t4, 0($t3)

Given x's address = 5000, which C statement does the following assembly carry out? addi $t0, $zero, 5000 lw $t1, 0($t0) addi $t1, $t1, 1 sw $t1, 0($t0)

x = x + 1