Digital Electronics Unit 3

Modulus n counter

A counter with a modulus of n

Flip flop

A sequential circuit based on a latch whose output changes when it's clock input receives a pulse

Decade counter

Any counter capable of going through 10 different logic States

Reset /clear

Asynchronous input used to set Q = 0 immediately

Preset

Asynchronous input used to set Q = one immediately

D latch

Circuit that contains a nand gate latch and two steering nand Gates

Synchronous counter

Counter in which all of the flip-flops are clocked simultaneously

Down counter

Counter that counts from a maximum count downward to zero

Propagation delays

Delay from the time a signal is applied to the time when the output makes its change

Shift register

Digital circuit that accepts binary data from some input sources and then shift the data through a chain of flip flops one bit at a time

Sequential logic

Digital circuitry in which the output state of the circuit depends not only on the states of the inputs but also on the sequence in which they reached their present States

Clock

Digital signal in the form of a rectangular pulse train or a square wave

Level sensitive

Enabled by a logic high or low level

Asynchronous inputs

Flip flop inputs that can affect the operation of the flip-flop independent of the synchronous and clock inputs

Duty cycle

Fraction of the total period that a digital waveform is in the high state DC equals th / T often expressed as a percentage %DC=th/ T X 100%

Binary counter

Group of flip flops connected in a special arrangement in which the states of the flip flops represent the binary number equivalent to the number of pulses that have occurred at the input of the counter

Trigger

Input signal to a flip flop or one shot that causes the output to change States depending on the conditions of the control signals

Edge sensitive

Manner in which a flip-flop is activated by a signal transition a flip-flop may be either a positive or A negative Edge triggered flip flop

State machines

Synchronous sequential circuit consisting of a sequential logic section and a combinational logic section who's outputs and internal flip flops progress through a predictable sequence of states in response response to a clock and other input signals

Period

The amount of time required for one complete cycle of a periodic event or waveform

Frequency

The number of cycles per unit time of a periodic waveform

Modulus

The number of states through which a counter sequences before repeating

Falling Edge

The part of a pulse where the logic level is in transition from a high to a low

Rising Edge

The part of a pulse where the logic level is transitioning from a low to a high

Asynchronous counter

Type of counter in which each flip flop output serves as the clock input signal for the next flip-flop in the chain.

Clocked JK flip flop

Type of flip-flop in which inputs J&K are the synchronous inputs

Clocked D flip flop

Type of flip-flop in which the data input is the synchronous input