Ch 11 computer arithmetic

ALU-

"The core or essence of the computer" -The operands for the ALU are stored in registers -The results from the ALU are also stores in registers -The processor provides control signals to the ALU -The ALU can set flags

Arithmetic shift

(part of booth's algorithm). It preserves the sign bit. Everything in A, Q, and Q-1 is shifted one place to the right, except the very first place of A, which remains the same.

Infinity in IEEE 754 is represented by

0 or 1 sign bit indicating +/- inf, all 1s for exponent, 0 for fraction.

Zero in IEEE 754 is represented by

0 or 1 sign bit, 0 exponent, 0 fraction

NaN (not a number) in IEEE 754 is represented by

0 or 1 sign bit, all 1s for exponent, non-zero fraction

Subnormal number in IEEE 754 is represented by

0 or 1 sign bit, exponent of zero, non-zero fraction that isn't a normal number- implicit 1 is no longer true. The true exponent is -126 or -1022.

Three types of floating point formats defined by standard 754

1. Arithmetic Format- All mandatory operations defined by the standard are supported by the format. The format may be used to represent floating-point operands of the results. 2. Basic format- Covers 5 floating point representations 3. Interchange format- Allows for data interchanged storage. Fully specified and fixed length.

Steps for addition and subtraction of floating-point numbers

1. Change sign (if subtracting) and check for zero 2. Significand alignment 3. Addition 4. Normalization- make sure result is a normal number

Steps for multiplication and division of floating-point numbers

1. check for zero 2. combine exponents (add or subtract, then do the opposite for the bias (ex: multiplication is adding exponents then subtracting bias)) 3. Multiply or divide significands (normally) 4. Normalize & round the significand

Four rounding techniques

1. round to nearest 2. round toward +inf 3. round toward -inf 4. Round toward zero

minuend

A number from which another number is subtracted (first number).

subtrahend

A number that is subtracted (second number)

Machine algorithm for long division

An accumulator register is set to zero while a register Q holds the dividend. In one cycle, the values in Q are shifted toward A while the gaps are filled with zeros. The last digit of Q is set to 1 if the divisor fits into the value in the accumulator. The number of cycles equals the number of digits.

Examples of floating-point formats IEEE 754

Binary 16,32,64,128, 32*(n+4) Decimal 64, 128, 32(n+4) Extended & Extendable precision

Hardware layout for addition and subtraction

Both operators are stored in registers. A complimenter can reverse (negate) the B register before both are sent to the adder. The adder can set an overflow bit to true.

Possible conditions produced by floating-point operations

Exponent overflow- exponent> exponent max Exponent underflow- exponent< exponent min Significand underflow- digits may be cut off the right end of the significand when allightment of the significands occurs. Significand overflow- two significands added together result in a number that goes too far left. Re-alignment can fix this.

Guard bits

Extra zeros at the right-end of the significand in the register. When re-alignment occurs, no bits of significance are lost.

Range extension for sign-magnitude representation

Fill in the newly created positions with zeros

Range extension for twos complement representation

If it is a positive number, simply fill in the spaces with zeros. If it is a negative number, fill in the spaces with ones. Ex: +18=00010010 --> +18= 0000000010010 -18= 10010010 --> -18= 111111111110010010

Overflow rule

If two numbers are added, and they are both positive or both negative, then overflow occurs if and only if the result has the opposite sign.

Manual division of unsigned binary integers

It follows the same process as base-10 long division.

Addition of integers in two's complement representation

Simply add the two together, carrying over if a place has a value (in base 10) of two or greater. Ignore the extra bit if it is created (the carry bit)

Round to nearest

The default rounding mode. "The representable value nearest to the infinently precise result shall be delivered." If it is in the middle, the even number is favored.

Sign-magnitude representation

The first bit indicates either zero for positive or one for negative. One problem this raises is that zero could either be 10 or 00. Ex: +18=00010010 or -18=10010010

IEEE Standard 754

The most important floating-point representation. It was created to increase portability of programs.

Binary multiplication implementation

The multiplier and multiplicand are loaded into two registers. If the next digit of the multiplicand is one, the multiplier is added to a result register. This process is repeated, each time shifting by one digit. A carry counter is also used.

Format of a floating point number written out

There is a plus or minus (sign bit), a significand, a base, and and exponent.

Subtraction rule

To subtract one number (subtrahend) from another number (minuend), take the twos complement of the subtrahend and add it to the minuend.

Negation of 2^(n-1)

Where n is the length of the binary number. It cannot occur in twos complement representation. Thus, the max range for a number in twos complement representation is (-2^(n-1), 2^(n-1)-1)

Biased representation for an exponent

a fixed value, called the bias, is subtracted from the field to get the true exponent value. Usually, the bias is half.

Extendable precision format

an example of IEEE 754 format. It has a precision and range that are defined under user control.

Extended precision formats

an example of an IEEE 754 format which extend a supported basic format by providing additional bits in the exponent and significand.

IEEE standard 754 for operations with infinity

follows standard math practices (think indeterminate forms)

positive overflow

greater than (2-2^-23)*2^128

negative underflow

greater than -2^(-127) but less than zero

Fixed-point representation

includes both sign-magnitude and twos complement representations. The radix point is fixed in the rightmost position.

Range Extension

increasing the length (and thus the potential range) of an integer value.

Binary Multiplication of unsigned numbers by hand

it is carried out like normal multiplication

Base of a floating point number

it is implicit (assumed to be 2) and is thus not stored

sign of a floating point number

it is the leftmost bit. 0= positive, 1=negative

Twos complement representation

like sign-magnitude, the first bit is a zero for positive of a one for negative. Zero, however, is represented by all zeros. If the number is negative, all places n-2 and earlier add to the negative number. It is the most used representation in computers.

Other names for significand

mantissa, fraction, argument, coefficent

Twos complement multiplication

negative numbers represented in twos complement notation will not multiply properly. If only the multiplicand but not the multiplier is negative, partial products can be filled with ones in front. Otherwise, booth's algorithm must be used.

negative overflow

numbers less than -(2 - 2^-23)*2^(128)

normal number

one in which the most significant digit of the significand is non-zero

positive underflow

positive numbers less than 2^-127

IEEE standard 754 quiet and signaling NaNs-

signaling NaNs report an error immediately, while quiet NaNs may propagate. Any "intermediate forms" in math produce a NaN, like inf/inf

round towards zero

simply truncation

Twos complement operation

taking the twos complement of an integer, which is negating a number in twos complement representation. 1. Take the Boolean complement of every bit of the integer (aka switch 0 and 1) 2. Treating the result as an unsigned binary integer, add one to its value. Ex: +18= 00010010 --> 11101110 = -18

Trailing significand field

the first digit of the significand is implied to be a one and is thus not included. The rest of the significand is referred to as the trailing significand.

Partial remainder

the intermediate remainders during division.

multiplicand

the number that is being multiplied (first number)

multiplier

the number that the multiplicand is multiplied by (second number)

Significand

the significant digits that are being stored.

Gradual underflow

the use of subnormal numbers to reduce the gap where underflow occurs.

Format in computer of a floating point number

there is a 1 bit sign bit, a biased exponent, and a significand.

Booth's algorithm

used to multiply two numbers in twos complement representation together, where both are negative.

rounding to plus and minus inf

useful in implementing a technique known as interval arithmetic.

Dividend

what is being divided (first number)

Divisor

what the dividend is divided by by (second number)

Carry-out during twos complement operation

when negating zero, after adding one to the complement, there will be an extra one at the start that has to be removed for zero to negate zero. Ex: 0000 --> 1111 --> 10000 -->0000

rounding

when the result of a floating-point operation is put back into floating-point format.

Trade-off between precision and range

with a given number of bits, only a given number of values can be stored. Thus, if range is increased, precision decreases. There might not be a value nearby to round to.