Chapter 9, 11, 12 Digital Electronics
How many binary output lines would be req for a four-digit BCD to binary converter
10
The IEEE/ANSI symbol for a decoder has the internal desgination BCF/DEC how many pins including Vcc and ground, would this IC have
16
The output of a basic four bit input digital to analog converter would be capable of outputting
16 different values of voltage or current that are proportional to the input binary number
One would normally expect a 16-input MUX to have a minimum of
16 input data lines and five input select lines
How many input lines would be req for a 1-of-8 decoder?
3
A digital-to-analog converter has a step size of 0.25 V and full-scale output of 7.75 V what is the percent resolution and the number of input binary number of input binary bits
31%, 5 bits
The greatest output current value from an 8-bit input DAC that has an output of 4.5 mA when the input binary number is 01101010
4.37 mA
Approximately how much current would be req to operate the number 6 on a 7 segment LED display if each segment req 10 mA?
40 mA
What 7 segment displays would be best suited for operation in a totally dark environment?
A 7- segment LED
Two eight input MUX can combine to send data over a single output line. The first step is combining select inputs. To complete the circuit.
A NOR gate must tie output lines together
More than one active input to an encoder will often produce an erroneous output. This problem may be partially overcome by the use of
A priority encoder to ensure that when more than one input is active the output will correspond to the highest-numbered input
Best describes the application of observation and analysis procedures when troubleshooting complex circuits
A thorough understanding of the operation of the circuit, observing the symptoms caused by the failure and using human reasoning to isolate the fault
The output voltage or current of a transducer would normally be the input of a
ADC
The IEEE/ANSI sybmbol for a decoder has the internal designation BCD/DEC. This means the decoder is a
Binary coded decimal to a decimal decoder with four inputs and ten outputs
A three line-to-eight line decoder has inputs CBA where A is the LSB. The output AND gates are lableled Q0 thro Q7. The output of AND gate Q4 should be active when
C B̅ A̅
A 74HC85 magnitude comparator is used to
Compare two input binary quantities and generate outputs to indicate which quantity has the greater magnitude
The Primary Differences Between a Decoder and an Encoder are
Decoders may have only one input line and one output line active at any given line
Decoders may at first appear to be difficult to learn but they are quire simple bc
Decoding is simply a procedure where each output line will be activated for only one of the possible combinations of inputs
One purpose of the comparator in a digital-ramp ADC is to
Enable the control unit as long as Vax is greater than Va
Common anode seven segment displays could be considered active high loads
False
It is normal for more than one decoder output to be active at the same time
False
Number system conversion can be accomplished using encoders
False
The circuit for a decoder is basically the same as for a MUX
False
This A/D converters is the highest-speed ADC available
Flash
The code conversion process for a two-digit BCD to binary converter would req ________ inputs and would have an output of ________ binary bits
Four two bit code group, seven
The basic advantage of active - matrix displays over a passive LCD displays is that the active matrix display have______________ resolution and __________ response times
Higher, Shorter
What is a characteristic of a pipelined ADC employing flash ADCs in the subranging stages
Inexpensive, fast, and high resolution
The following groups of terms best describes the inputs and the componets associated with a MUX?
Input address lines, input data lines, inverters, AND gates, and an output OR gate
The output lines for a DEMUX are under the direct control of the
Internal AND gate
A technician is writing a circuit that req a DAC. Two DAC's are available with the proper full-scale output. His req are for small resolution values and precision in the analog output. Generally, the DAC with the __________ step size and the __________ percent of resolution should be selected
Largest, largest
A 16-input mux is to be used to perform parallel to serial data conversions. Which of the following counters would be required to provide the data select inputs
MOD-4
The parallel data from a branch bank's computer terminal is to be transferred over telephone lines to the main bank's computer. You would expect to find a __________ at the transmitting end and _________ at the receiving end.
MUX, DEMUX
When comparing the conversions from digital-to-analog and analog-to- digital, the A/D conversion is generally
More complicated and more time consuming than the D/A conversion
MUX of digital signals is usually req when
Moving data internally within a microprocessor and moving data between memory and storage registers
A decoder has outputs labled Q0 thro Q7. The output gates for this device are
NOR gates
In 1-of- 10 BCD to decimal decoder
Output lines 0-9 will be activated with any valid BCD code
Magnitude comparators are useful for speed control, temp control, and level control. After these analog quantities are sampled.
Quantities are converted to equivalent freq through another converter
If a DAC has an open input, it would most probably fail the
Staircase test
A numeric display-driven by a 744X driver - is used to display the output from a BCD counter. If this counter only displays the numbers 0, 2, 4, 6, and 8 then troubleshooting should be narrowed down to
The "b" and "c" and "d" segments on the numeric display
What will happen if the input analog voltage (Va) is greater than a digital-ramp ADCs full-scale (Vax) value
The counter will repetitively count up from zero to maximum producing a continuously repetitive staircase waveform at Vax
Select the statement that best describes the input resistor values for a simple DAC using an op-amp as a summing amplifier
They are binarily weighted with the LSB resistor having a values equal to the feedback resistor and the MSB having the highest value
CMOS devices are generally used to drive 7 segment LCD displays bc
They consume less power than TTL devices and their output voltage in the LOW state is always above 0.5v
What is the purpose of a decoder's enable inputs?
To allow the decoder to respond to the inputs to activate the correct output gate
A DEMUX does not use an OR gate as the output gate bc of the multiple output lines
True
All decoder inputs correspond to a decoder decimal equivalent output
True
Alphanumeric LCD displays interfaces are standardized so that an LCD module from any manufacturer uses the same signal and data format
True
Basically, a MUX changes parallel data inputs to a serial data output
True
Decoder/Drivers, like the TTL7445 can be used to drive loads such as LEDs, lamps, relays, and small DC motors
True
In contrast to other types of decoders, displays decoder/drivers activate more than one output for any given input
True
LCD displays are more visible in low light conditions than LED displays
True
LCD displays req less current than LEDs
True
Modern computers transfer data between different devices over a common set of connecting lines called data buses
True
Storing three digits entered by a keypad would require two four-bit registers
True
The relatively slow transmission time of data on bus line may be attributed directly to capacitive loading of the lines
True
The select inputs to a MUX may also be called address lines
True
An eight input MUX can easily be converted for use as a parallel to serial converter. What would be the appropriate way to sequence the data select inputs
Use a MOD 8 Asynchronous converters
A three-to-eight line decoder could also be called
a binary to octal decoder
The DAC that is selected to would be req to have
a greater number if input binary bits than the rejected DAC
Two basic methods to test a DAC's operation consist of
a static accuracy test and a staircase test
A MUX/Data selector is a logic circuit that
accepts data inputs from several lines and allows one of them at a time to pass to the output
Decoders are normally used whenever
an output or group of outputs is to be activated only when a specific combo of inputs occur
A major application for digital signal processing is in filtering and conditioning
analog signals
The sampling freq for a 10 Khz input signal should be ______ samples per second
at least 20,000
A BCD decoder that has active HIGH outputs would req a common ________ 7 segment LED display
cathode
A transducer is a device that
converts a physical variable to an electrical variable
An actuator is usually a device that
converts a physical variable to an electrical variable
A DAC
converts the digital output of a computer to a corresponding analog rep, usually voltage or current
Digital quantities have values that are specified as 1 or 0, HIGH or LOW. The voltage values associated with these digital quantities fall within specified limits. On the other hand, analog values for physical process control may be any value over a wide range of values, with each different value having a different meaning
digital computers that monitor or control analog physical values must have an accurate means of transforming analog data to meaningful digital data and vice-versa
usually a decoder circuit without bubbles on the outputs has only one output HIGH while all the other outputs are LOW
false
As compared to regular registers, bidirectional registers generally have
fewer bus connections and common I/O lines
The three types of ADCs that do not use a DAC as part of the conversion process are
flash ADC, voltage to freq ADC, digital ramp ADC, and Dual - Slope ADC
A BCD to decimal decoder would be required to have
four input lines and ten output lines
Two principal adavantages of the Dual-Slope ADC are
high sensitivity to noise and low cost
A DAC is monotonic if its output
increases as the binary input increases from one input to the next
The quantization error in an analog to digital converter can be reduced by
increasing the number of bits in the counter and DAC
A DEMUX accepts data from
one input line and transfers it to multiple output lines
The most likely ADC architecture for a spectrum analyzer is
pipelined
The main advantages of the successive-approximation ADC over the digital-ramp ADC is its
shorter conversion time
Two ways to determine the output of a BCD DAC converter are to
sim the BCD weights of all bits that are 1s, or add the decimal number value for each BCD code group and multiply that value by the step size
Sample-and-hold circuits in ADCs are designed to
stabilize the comparator's threshold voltage (Vt) during conversion process
Output error of an ADC is obtained by
subtracting the full-scale error from the quantization error
The most likely ADC architecture for the majority of complex data acquisition system is
successive approximation
If you were designing a computer data acquisition system that req the use of analog-to-digital converters when analog data are changing at a fast rate, you would most likely select an SAC A/D converter bc
the SAC will enable the computer to acquire more data values in a given period of time
The process of a computer generating a START pulse, examining EOC, and loading ADC data into memory is controlled by
the magnitude of VA
Signal aliasing results in
the sampled signal having a freq that is twice the original input signal
Sample and Hold circuit's acquistion time is dependent upon
the value of Ch
The resolution or step size of a 4-bit, or any other, digital to analog converter may be defined as
the value of the K proportionality factor
Internal computer registers that store data are often connected to the computer data bus lines by
tri-state buffers
Incandescent 7 segment displays are especially well suited for use in portable battery-operated devices
true
