CSc 256 MIPS Assembly Instructions

अब Quizwiz के साथ अपने होमवर्क और परीक्षाओं को एस करें!

Program Counter (PC) [instruction address register]

$pc

Machine language

(numeric form of instruction) binary representation used for a communication within a computer system

Sign Magnitude

1st bit represents sign, remaining bits represent magnitude. == Weaknesses == - Two representations of 0. - Different operations on signed and unsigned integers.

11011

27 in decimal

MIPS operands

32 registers 2^30 memory words

Recursion

A process whereby a method refers to itsself. In many programming languages, a procedure of function can call itsself.

assembler

A program that translates a symbolic version of instructions into the binary version.

callee-saved register

A register saved by the routine making a procedure call.

alignment restriction

A requirement that data be aligned in memory on natural boundaries.

basic block

A sequence of instructions without branches (except possibly at the end) and without branch targets or branch labels.

aliasing

A situation in which the same object is accessed by two addresses; can occur in virtual memory when there are two virtual addresses for the same physical page.

delayed branch

A type of branch where the instruction immediately following the branch is always executed, independent of whether the branch condition is true or false.

Registers# 4,5,6,7: $a0, $a1, $a2, $a3 used for

Argument 1 Argument 2 Argument 3 Argument 4

Word

The natural unit of access in a computer, a group of 32 bits, corresponds to the size of the register in MIPS architecture. Words are multiples of bytes. There are 4 bytes in a word. Each byte is 8 bits.

caller

The program that instigates a procedure and provides the necessary parameter values.

Instruction Set

the vocabulary of commands understood by a given architecture.

Negative numbers

to form a negative number- invert the bits and add 1. left most bit are ones- represent negative sign in signed numbers

compiler

translates from higher language (C) to MIPS

Unconditional branch: j-jump

used in loops

Jump and Link instruction: jal

used to call subroutines, the next instruction is linked

Add immediate (addi)

uses constant as one of the 3 operands. used to add constant to register. addi $s3, $s3, 4

Case or Switch statement

uses jr - jump register instruction, unconditional jump to the address specified in a register.

XOR

output is true if the two inputs are different, output is False if the two inputs are alike

Machine code

sequence of instructions in numeric form

slt

set on less than. set one register to 1 when value in second register is less than the value in the third register. used in "for" and other loops slt $t0, $s3, $s4 //$t0=1 if $s3<$s4

slti

test if register is less than constant and set the other register for 1 if it is. slti $t0, $s2, 10

Minimum integer expressible in 32-bit 2's complement

-2^31 (also 0x80000000)

Maximum integer expressible w/ 32 bits

-2^31-1 (also 0x7fffffff)

0x80000000 + 0x80000000

0x0

address translation

Also called address mapping, it's the process by which a virtual address is mapped to an address used to access memory.

absolute

An ____ address is a variable's or routine's actual address in memory

conditional branch

An instruction that requires the comparison of two values and that allows for a subsequent transfer of control to a new address in the program based on the outcome of the comparison.

assembler directive

An operation that tells the assembler how to translate a program but does not produce machine instructions; always begins with a period.

Unary Operator

An operator requiring only one operand to give a simple result

32 bit machines

Can store 2^32 memory locations = 4 GB

64 bit machines

Can store 2^64 memory locations = 16 GB

Reference

Contains the location in memory of an object. The object can contain many individual data members.

Two's Complement

Equivalent to taking one's complement and adding 1. == Strengths == - Same operations for signed and unsigned! - One representation of 0! == Weaknesses == - Not symmetric around zero.

Registers # 2 and 3: $v0 and $v1 used for

Expression evaluation and results of a function

Register#30: $fp (or $s8) used for

Frame pointer

I-format, type of instruction format (lw, sw)

I stands for immediate. has the following 4 fields: -op (6 bits) -rs (5 bits): base register -rt (5 bits): destination register -constant or address (16 bits)

Little-endian

Least significant bytes first in memory (Most Intel-compatible machines are little-endian)

Big-endian

Most significant bytes first in memory

MIPS addresses for words

Multiples of 4. To get a proper byte address, the offset to be added to the base register (register used to form an address) is X times 4. The addresses (array index) are 0, 4, 8, 12,16 and so on

addressing mode

One of several addressing regimes delimited by their varied use of operands and/or addresses.

Register #28: $gp used for

Pointer to global area

R-format type of instruction format (add, sub)

R stands for Register. has the following 6 fields: -op (6bits): denotes format and operation of an instruction -opcode -rs (5 bits): the first register source operand -rt (5 bits): the second register source operand -rd (5 bits): The register destination operand. It gets the result of operation -shamt( 5 bits): shift amount -funct (6 bits): Function. This field is function code, selects the specific variant of the operation in op field

Register#31: $ra used for

Return address (used by function call)

Registers # 16,17,18,19, 20, 21,22, 23: $s0-$s7 are used for

Saved temporary (preserved across call)

Register #29: $sp used for

Stack pointer

Registers # 24,25: $t8, $t9 used for

Temporary (not preserved across call)

Registers # 8,9,10,11,12,13,14,15: $t0-$t7 used for

Temporary (not preserved across call)

branch target address

The address specified in a branch, which becomes the new program counter if the branch is taken.

Hexadecimal notation

Uses base 16. It's more compact than binary, but readable.

Conditional instructions

bne, beq, slt, slti and $zero are used to create conditons not equal, equal, less than, less than or equal, greater than, greater than or equal

Data transfer instruction

a command that moves data between memory and registers

Memory

a large single-dimensional array, with the address acting as the index to that array, starting at 0.

Spilling registers

a process of putting less commonly used variables or those needed later into memory

Sentinel

a special value that marks the end of a set of data. Also called and "end of data marker" or "rogue value".

procedure

a stored subroutine that performs a specific task based on the parameters with which it is provided

Jump address table or jump table

a table of addresses of alternative instruction sequence

Address (memory address)

a value used to delineate the location of a specific data element within a memory array

Conditional branches: beq- branch if equal and bne- branch if not equal

an instruction that requires a comparison of two values and that allows for a subsequent transfer of control to a new address in a program based on the outcome of the comparison. used in if-then-else, loops

arrays

can only be initialized at the time of declaration

Register #0: $zero used for

constant zero

pointer variable

contains the value stored at a particular memory address

Store word

copies data from register to memory

Load word ( lw )

data transfer instruction that copies data from memory to a register. Format: name of operation + register to be loaded+ memory address [offset constant and register used to access memory (base register)].

sll and srl

logical operations that move by n bits to left or right, shift-left-logical, shift-right-logical (sll, $t0, 2)


संबंधित स्टडी सेट्स

Chapter4:Management Ethics and Social Responsibility

View Set

PSYC 317 Ch. 7 Correlational Research

View Set

Chapter 9: Managing Conflict in Relationships

View Set

International Relations Chapter 9

View Set

Intro to Cybersecurity - Chapters 2 & 3 (Cisco Networking Academy)

View Set

human anatomyChapter 8: Appendicular Skeleton Part 1 - PECTORAL GIRDLE & UPPER LIMB

View Set

Advanced Chemistry: Lab Safety Quiz Study Guide

View Set