T/F CEA201
"Don't care" conditions are when certain combinations of values of variables never occur, and therefore the corresponding output never occurs.
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.Compared with addition and subtraction, multiplication is a complex operation, whether performed in hardware of software.
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A bit near the center of a rotating disk travels past a fixed point slower than a bit on the outside.
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A branch can be either forward or backward.
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A combinational circuit consists of n binary inputs and m binary outputs.
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A computer must be able to process, store, move, and control data.
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A cycle is made up of a sequence of micro-operations.
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A disadvantage of memory-mapped I/O is that valuable memory address space is used up.
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A key requirement for PCIe is high capacity to support the needs of higher data rate I/O devices such as Gigabit Ethernet.
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A nibble is a grouping of four decimal digits.
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A number of chips can be grouped together to form a memory bank.
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A number with both an integer and fractional part has digits raised to both positive and negative powers of 10.
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A particular architecture may span many years and encompass a number of different computer models, its organization changing with changing technology
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A removable disk can be removed and replaced with another disk.
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A set of I/O modules is a key element of a computer system.
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A static RAM will hold its data as long as power is supplied to it.
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A typical computer system is equipped with a hierarchy of memory subsystems, some internal to the system and some external.
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A wafer is made of silicon and is broken up into chips which consists of many gates and/or memory cells plus a number of input and output attachment points.
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ARM processors support data types of 8 (byte), 16 (halfword), and 32 (word) bits in length.
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ARM provides a versatile virtual memory system architecture that can be tailored to the needs of the embedded system designer.
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Actual floating-point representations include a special bit pattern to designate zero.
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Addition and subtraction can be performed on numbers in twos complement notation by treating them as unsigned integers.
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Addresses are a form of data.
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All DRAMs require a refresh operation.
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All of the Pentium processors include two on-chip L1 caches, one for data and one for instructions.
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Although convenient for computers, the binary system is exceedingly cumbersome for human beings.
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An I/O channel has the ability to execute I/O instructions, which gives it complete control over I/O operations.
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An L1 cache that does not connect directly to the bus cannot engage in a snoopy protocol.
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An SMP operating system manages processor and other computer resources so that the user perceives a single operating system controlling system resources.
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An advantage of biased representation is that nonnegative floating-point numbers can be treated as integers for comparison purposes.
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An advantage of using a shared L2 cache on the chip is that data shared by multiple cores is not replicated at the shared cache level.
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An attractive feature of an SMP is that the existence of multiple processors is transparent to the user.
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An interrupt is a hardware-generated signal to the processor.
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At a top level, a computer consists of CPU, memory, and I/O components.
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At the completion of the execute cycle a test is made to determine whether any enabled interrupts have occurred, and if they have, the interrupt cycle occurs.
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Backward compatible means that the programs written for the older machines can be executed on the new machine.
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Because all devices on a synchronous bus are tied to a fixed clock rate, the system cannot take advantage of advances in device performance.
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Because of the inherent binary nature of digital computer components, all forms of data within computers are represented by various binary codes.
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Because the 82C55A is programmable via the control register, it can be used to control a variety of simple peripheral devices.
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Both batch multiprogramming and time sharing use multiprogramming.
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Both clusters and symmetric multiprocessors provide a configuration with multiple processors to support high-demand applications.
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Both sequential access and direct access involve a shared read-write mechanism.
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Both sign-magnitude representation and twos complement representation use the most significant bit as a sign bit.
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Both the structure and functioning of a computer are, in essence, simple.
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Bus arbitration makes use of vectored interrupts.
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Changes in technology not only influence organization but also result in the introduction of more powerful and more complex architectures.
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Computer organization refers to attributes of a system visible to the programmer
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Computer systems contain a number of different buses that provide pathways between components at various levels of the computer system hierarchy.
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Computers are classified into generations based on the fundamental hardware technology employed.
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Condition codes facilitate multiway branches.
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Database management systems and database applications are one area in which multicore systems can be used effectively.
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Designers wrestle with the challenge of balancing processor performance with that of main memory and other computer components.
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Each micro-operation of the fetch cycle involves the movement of data into or out of a register.
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Each phase of the instruction cycle can be decomposed into a sequence of elementary micro-operations.
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Even if an individual application does not scale to take advantage of a large number of threads, it is still possible to gain from multicore architecture by running multiple instances of the application in parallel.
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Events in the digital computer are synchronized to a clock pulse so that changes occur only when a clock pulse occurs.
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Flash memory becomes unusable after a certain number of writes.
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For each 1 on the multiplier, an add and a shift operation are required; but for each 0 only a shift is required.
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For the control unit to perform its function it must have inputs that allow it to determine the state of the system and outputs that allow it to control the behavior of the system.
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Hexadecimal notation is more compact than binary notation.
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IBM's System/360 was the industry's first planned family of computers.
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In a traditional scalar organization there is a single pipelined functional unit for integer operations and one for floating-point operations.
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In a volatile memory, information decays naturally or is lost when electrical power is switched off.
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In effect, the Pentium 4 architecture implements a CISC instruction set architecture on a RISC microarchitecture.
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In general, a decoder has n inputs and 2n outputs.
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In general, the more devices attached to the bus, the greater the bus length and hence the greater the propagation delay.
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In the absence of parentheses, the AND operation takes precedence over the OR operation.
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Instruction pipelining is a powerful technique for enhancing performance but requires careful design to achieve optimum results with reasonable complexity.
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Intel's 4004 was the first chip to contain all of the components of a CPU on a single chip.
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Interfaces between the computer and peripherals is an example of an organizational attribute.
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Interrupt processing allows an application program to be suspended in order that a variety of interrupt conditions can be serviced and later resumed.
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It has become common practice to use a symbolic representation of machine instructions.
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It has become possible to have a cache on the same chip as the processor.
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It is common for programs, both system and application, to continue to exhibit new bugs after years of operation.
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It is extremely easy to convert between binary and hexadecimal notation.
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John Mauchly and John Eckert designed the ENIAC.
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Magnetic disks are the foundation of external memory on virtually all computer systems.
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Negative powers of 10 are used to represent the positions of the numbers for decimal fractions.
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No single technology is optimal in satisfying the memory requirements for a computer system.
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One advantage of linking the addressing mode to the operand rather than the opcode is that any addressing mode can be used with any opcode.
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One boundary where the computer designer and the computer programmer can view the same machine is the machine instruction set.
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One drawback of sign-magnitude representation is that there are two representations of 0.
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One of the major problems in designing an instruction pipeline is assuring a steady flow of instructions to the initial stages of the pipeline.
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One of the trade-offs of floating-point math is that many calculations produce results that are not exact and have to be rounded to the nearest value that the notation can represent.
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One of the traditional ways of describing processor architecture is in terms of the number of addresses contained in each instruction.
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One technique for implementing a control unit is referred to as hardwired implementation, in which the control unit is a combinatorial circuit.
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Pipelining is a means of introducing parallelism into the essentially sequential nature of a machine-instruction program.
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Privileged instructions are certain instructions that are designated special and can be executed only by the monitor.
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Program execution consists of repeating the process of instruction fetch and instruction execution.
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QN=1 Microprogramming eases the task of designing and implementing the control unit and provides support for the family concept.
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QN=4 It is the responsibility of the processor to periodically check the status of the I/O module until it finds that the operation is complete.
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RAID is a set of physical disk drives viewed by the operating system as a single logical drive.
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RAID level 0 is not a true member of the RAID family because it does not include redundancy to improve performance.
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RAM must be provided with a constant power supply.
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RISC processors are more responsive to interrupts because interrupts are checked between rather elementary operations.
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Register addressing is similar to direct addressing with the only difference being that the address field refers to a register rather than a main memory address.
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Register renaming eliminates antidependencies and output dependencies.
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Resources include: memories, caches, buses, and register-file ports.
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Scheduling and memory management are the two OS functions that are most relevant to the study of computer organization and architecture.
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Semiconductor memory comes in packaged chips.
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Software cache coherence schemes attempt to avoid the need for additional hardware circuitry and logic by relying on the compiler and operating system to deal with the problem.
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Swapping is an I/O operation.
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Symmetric multiprocessors (SMPs) are one of the earliest, and still the most common, example of parallel organization.
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The ARM11 MPCore is an example of the L1 cache being divided into instruction and data caches.
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The Cortex-A8 targets a wide variety of mobile and consumer applications including mobile phones, set-top boxes, gaming consoles and automotives navigation/entertainment systems.
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The IAS is the prototype of all subsequent general-purpose computers.
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The OS must determine how much processor time is to be devoted to the execution of a particular user program.
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The Pentium II includes hardware for both segmentation and paging.
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The SSDs now on the market use a type of semiconductor memory referred to as flash memory.
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The base with index and displacement mode sums the contents of the base register, the index register, and a displacement to form the effective address.
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The basic element of a semiconductor memory is the memory cell.
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The basic function of a computer is to execute programs.
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The cache is capable of handling global as well as local variables.
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The control unit controls the operation of the processor.
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The control unit is the engine that runs the entire computer.
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The cycle time of an instruction pipeline is the time needed to advance a set of instructions one stage through the pipeline.
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The decimal system is a special case of a positional number system with radix 10 and with digits in the range 0 through 9.
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The delay by the propagation time of signals through the gate is known as the gate delay.
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The disadvantage of immediate addressing is that the size of the number is restricted to the size of the address field.
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The disadvantage of the software poll is that it is time consuming.
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The execution of a program consists of the sequential execution of instructions.
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The focus of MMX technology is multimedia programming.
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The head must generate or sense an electromagnetic field of sufficient magnitude to write and read properly.
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The hierarchical nature of complex systems is essential to both their design and their description.
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The increasingly difficult engineering challenge related to processor logic is one of the reasons that an increasing fraction of the processor chip is devote to the simpler memory logic.
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The instruction set is the programmer's means of controlling the processor.
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The key to the design of a supercomputer or array processor is to recognize that the main task is to perform arithmetic operations on arrays or vectors of floating-point numbers.
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The memory transfer rate has not kept up with increases in processor speed.
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The method of calculating the EA is the same for both base-register addressing and indexing.
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The method of using the same lines for multiple purposes is known as time multiplexing.
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The most important measure of performance for a processor is the rate at which it executes instructions.
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The most important system program is the OS.
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The number of bits used to represent various data types is an example of an architectural attribute.
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The numbers represented in floating-point notation are not spaced evenly along the number line, as are fixed-point numbers.
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The operation of the digital computer is based on the storage and processing of binary data.
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The operation to be performed is specified by a binary code known as the operation code.
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The organizational changes in processor design have primarily been focused on increasing instruction-level parallelism so that more work could be done in each clock cycle.
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The potential performance benefits of a multicore organization depend on the ability to effectively exploit the parallel resources available to the application.
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The predict-never-taken approach is the most popular of all the branch prediction methods.
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The prefetch buffer is a memory cache located on the RAM chip.
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The principal price to pay for variable-length instructions is an increase in the complexity of the processor.
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The processor needs to store instructions and data temporarily while an instruction is being executed.
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The processor requires its own local memory.
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The register file employs much shorter addresses than addresses for cache and memory.
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The register file is on the same chip as the ALU and control unit.
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The reorder buffer is temporary storage for results completed out of order that are then committed to the register file in program order.
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The schedulers are responsible for retrieving micro-ops from the micro-op queues and dispatching these for execution.
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The simplest instruction issue policy is to issue instructions in the exact order that would be achieved by sequential execution (in-order issue) and to write results in that same order (in-order completion).
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The superscalar approach depends on the ability to execute multiple instructions in parallel.
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The superscalar approach has now become the standard method for implementing high-performance microprocessors.
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The term SMP refers to a computer hardware architecture and also to the operating system behavior that reflects that architecture.
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The textbook for this course is about the structure and function of computers.
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The thermal management unit monitors digital sensors for high-accuracy die temperature measurements.
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The two traditional forms of RAM used in computers are DRAM and SRAM.
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The value of the mode field determines which addressing mode is to be used.
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The value to be loaded into the program counter can come from a binary counter, the instruction register, or the output of the ALU.
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The x86 is equipped with a variety of addressing modes intended to allow the efficient execution of high-level languages.
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There are 50 tens in the number 509.
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There are typically hundreds of sectors per track and they may be either fixed or variable lengths.
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There is a tremendous variety of products, from single-chip microcomputers costing a few dollars to supercomputers costing tens of millions of dollars that can rightly claim the name "computer".
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Timing refers to the way in which events are coordinated on the bus.
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To achieve greatest performance the memory must be able to keep up with the processor.
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True data dependency is also called flow dependency or read after write (RAW) dependency.
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Unrolling can improve performance by increasing instruction parallelism by improving pipeline performance.
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When large volumes of data are to be moved, a more efficient technique is direct memory access (DMA).
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While the processor is in user mode the program being executed is unable to access protected system resources or to change mode, other than by causing an exception to occur.
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With a batch operating system the user does not have direct access to the processor.
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With a fixed-point notation it is possible to represent a range of positive and negative integers centered on or near 0.
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With direct addressing, the length of the address field is usually less than the word length, thus limiting the address range.
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With simple, one cycle instructions, there is little or no need for microcode.
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With superscalar organization increased performance can be achieved by increasing the number of parallel pipelines.
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With write back updates are made only in the cache.
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Within the processor there is a set of registers that function as a level of memory above main memory and cache in the hierarchy.
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