Module 1
What is the range of decimal values for an unsigned DWORD?
0 to 4,294,967,295
How many *bits* long is a WORD on x86 systems?
16
How many binary digits are represented by a series of 4 hexadecimal characters?
16
What is the largest unsigned integer that may be stored in 24 bits?
16,777,215
SWORD
16-bit signed integer
WORD
16-bit unsigned integer.
How many binary digits are represented by a series of 7 hexadecimal characters?
28
What is the largest signed integer that may be stored in 32 bits?
2^31 - 1
How many *bits* long is a DWORD (doubleword) on x86 systems?
32
What is the size of the general-purpose registers?
32 bits
What is the width of the address and data buses?
32 bits
REAL4
32-bit (4-byte) IEEE short
SDWORD
32-bit signed integer.
DWORD
32-bit unsigned integer
There are how many segment registers?
6
REAL8
64-bit (8-byte) IEEE long
There are how many general purpose registers?
8
BYTE
8-bit unsigned integer.
What would you call an ordered list of organized instructions existing somewhere in memory, and associated with a data structure for storage of data?
A program!
Define "Bus"
A set of parallel "wires" for transferring a set of electrical signals simultaneously.
Is the following a valid 8-bit register references? If so, describe what it references? If not, why? AL
AL: Yes, refers to bits 0-7 of EAX
What unit on a CPU chip is responsible for computing basic addition and subtraction operations?
ALU
On a computer, where is simple integer math computed?
ALU - Arithmetic/Logic Unit
Level 2 of 4 (4 Being Highest) of Language Hierarchy
ARM Assembly
What is an instruction?
An instruction is a control phrase for the computer which will be translated (with its operands) into a op code (Machine Language)
Step 2 of 4 for a memory read in the correct order.
Assert a Read
A ______ Architecture's instructions are decoded to micro-programs which are executed by the CPU.
CISC
Which flag is set when the result of an unsigned arithmetic operation is too large to fit into the destination?
Carry Flag
Name at least four CPU status flags.
Carry, Overflow, Parity, Auxiliary Carry, Sign, Direction, Zero
Language Hierarchy: The purpose of a Compiler is to...
Convert High/Low level Program Code to Assembly/Machine Code
Is the following a valid 8-bit register references? If so, describe what it references? If not, why? DH
DH: Yes, refers to bits 8-15 of EDX
Step 3 of 6 of the instruction execution cycle in its proper order.
Decode the instruction in the Instruction Register.
Why does protected mode prevent programs from changing the EIP register directly?
EIP contains the memory address of the next instruction to be fetched. Since the programmer ordinarily will not know the absolute address where any of the instructions are stored, protected mode restricts access to EIP, and allows it to be changed only by the operating system.
Is the following a valid 8-bit register references? If so, describe what it references? If not, why? EL
EL: No, ES register can't be byte-referenced.
Highest Level (4 of 4) of Language Hierarchy
English
Step 5 of 6 of the instruction execution cycle in its proper order.
Execute the instruction.
(True/False) A single computer architecture may have programs written for it using more than one Assembly Language (x86, RISC-V, ...).
False
(True/False) Assembly Language programs are 'higher level' than C programs.
False
(True/False) Assembly Language programs are portable to a variety of computer architectures.
False
ALU is a component of the Control Unit. T/F?
False
Assembly Languages are *portable*. T/F?
False
Changes made to the AL register will not modify the contents of the EAX register. T/F?
False
If an integer's sign bit is 1, the integer is positive. T/F?
False
Multi-Purpose Registers are a component of the Control Unit. T/F?
False
The ASCII code values for alphabetic letters (e.g. 'a') are smaller than for decimal digits (e.g. '1'). T/F?
False
Step 1 of 6 of the instruction execution cycle in its proper order.
Fetch the instruction at the address in the Instruction Pointer into the Instruction Register.
How is data pulled from memory?
First, the address where the data resides is put in MAR, then on the address bus, then a 'memory read' is triggered and the data is pulled from that particular memory cell, put on the data bus, and then into the MDR.
Which register points to the address of the next instruction to be executed?
IP - Instruction Pointer (EIP in IA32)
Which register holds the opcode of current instruction being executed?
IR - Instruction Register
Step 4 of 6 of the instruction execution cycle in its proper order.
If the instruction requires memory access, determine the memory address, and fetch the operand from memory into a CPU register, or send the operand from a CPU register to memory.
Step 6 of 6 of the instruction execution cycle in its proper order.
If the output operand is in memory, the control unit uses a write operation to store the data.
Step 2 of 6 of the instruction execution cycle in its proper order.
Increment the Instruction Pointer to point to next instruction's address.
Name three components of the Control Unit?
Instruction Pointer, Instruction Register, Status Register
An Assembly Language is defined by the . . .
Instruction Set Architecture (ISA)
A program that combines object files into an executable program is called a ______.
Linker
Lowest Level (1 of 4) of Language Hierarchy
Machine Code
A signed integer stores the sign in the . . .
Most significant bit (MSB)
Step 4 of 4 for a memory read in the correct order.
Move data to its destination.
What is the main purpose of caching?
Moving information from slowerstorage to faster storage, where it can be accessed more quickly.
Compared to higher-level languages, is the following a benefit of Assembly Language programming? Ease of Use
No
Compared to higher-level languages, is the following a benefit of Assembly Language programming? Integrated Tools
No
Compared to higher-level languages, is the following a benefit of Assembly Language programming? Intuitive Programs
No
Where is a major data transfer bottleneck in a computer, and what helps resolve it?
One major bottleneck is the data bus, because both the program instructions and the data must be retrieved from from the same memory to be executed or used. Caching helps reduce the impact.
Which flag is set when the result of a signed arithmetic operation is either too large or too small to fit into the destination?
Overflow Flag
In a vonNeumann architecture, how are programs organized?
Programs are stored in memory and executed according to an instruction execution cycle.
Which Operation Mode prevents access to critical memory segments?
Protected Mode
Level 3 of 4 (4 Being Highest) of Language Hierarchy
Python
A ______ Architecture's instructions are *directly* executed by the CPU.
RISC
Which Operation Mode provides compatibility for legacy 8086 programs?
Real-Address mode
What storage unit is the closest/fastest on the chip?
Registers
Is the following a valid 8-bit register references? If so, describe what it references? If not, why? SH
SH: No, this would be ambiguous, because we have ESP, ESI, and SS registers
Which flag is set when an arithmetic or logical operation generates a negative result?
Sign Flag
Step 1 of 4 for a memory read in the correct order.
Specify the memory address on the Address Bus via MAR.
In 32-bit mode, aside from the stack pointer (ESP), what other register points to stack addresses?
Stack Segment (SS), possibly EBP depending on usage
What component's primary duty is synchronizing processes inside a computer?
System Clock
What component's primary duty is synchronizing processes inside a computer?
System clock
Which register holds the current micro-instruction?
The Control Register
Which register holds the current machine instruction?
The Instruction Register (IR)
What is the Address Bus used for?
The address bus is used to communicate a specific memory location for reads or writes, e.g. Read from "this address on the address bus"
(True/False) A single computer architecture may have programs written for it using more than one assembler (MASM, NASM, FASM, ...)
True
(True/False) Assembly Language instructions have a nearly 1:1 correspondence with Machine Code.
True
(True/False) High-level language (HLL) programs are portable to a variety of computer architectures.
True
Instruction Pointer is a component of the Control Unit. T/F?
True
Instruction Register is a component of the Control Unit. T/F?
True
Status Register is a component of the Control Unit. T/F?
True
The status flags are implemented as individual bits within the Status & Control Register.
True
Step 3 of 4 for a memory read in the correct order.
Wait until operation is complete.
Compared to higher-level languages, is the following a benefit of Assembly Language programming? Direct Manipulation of Memory
Yes
Compared to higher-level languages, is the following a benefit of Assembly Language programming? Hands-on Code Optimization
Yes
If the AH register is modified by the software engineer, is there any change in the EAX register? Why or why not?
Yes, the AH register is part of the EAX register. Specifically, the bits 0-7 of the AH are exactly bits 8-15 of EAX.
High-speed memory that reduces the frequency of access by the CPU to conventional memory is called
cache memory
A program is considered portable if it . . .
can be executed on multiple platforms.
The three types of buses connected to the CPU are:
data, address, control
During which phase of the instruction execution cycle is the program counter incremented?
fetch
What best describes the relationship from *assembly language instructions* to *machine language instructions*?
nearly one to one
A ______ is a container for data which resides on the CPU chip.
register
The Parity flag
result of boolean or arithmetic op has even number of bits in its LSB
The Sign flag
result of operation is negative
The Zero flag
result of operation is zero
The Overflow flag
signed integer overflow
The Carry flag
unsigned integer overflow